MPC5125YVN400 Freescale Semiconductor, MPC5125YVN400 Datasheet - Page 903

• Manufacturer Part Number: MPC5125YVN400
• Description: IC MCU 32BIT E300 324TEPBGA
• Manufacturer: Freescale Semiconductor
• Series: MPC51xxr

Specifications of MPC5125YVN400

• Core Processor: e300
• Core Size: 32-Bit
• Speed: 400MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, USB OTG
• Peripherals: DMA, WDT
• Number Of I /o: 64
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.33 V ~ 1.47 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 324-PBGA
• Processor Series: MPC51xx
• Core: e300
• Data Bus Width: 32 bit
• Development Tools By Supplier: TWR-MPC5125-KIT, TWR-SER, TWR-ELEV, TOWER
• Maximum Clock Frequency: 400 MHz
• Operating Supply Voltage: 1.4 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Data Ram Size: 32 KB
• I/o Voltage: 3.3 V
• Interface Type: CAN, I2C
• Minimum Operating Temperature: - 40 C
• Program Memory Size: 32 bit
• Cpu Speed: 400MHz
• Embedded Interface Type: CAN, I2C, SPI, UART, USB
• Digital Ic Case Style: TEPBGA
• No. Of Pins: 324
• Rohs Compliant: Yes
• Cpu Family: MPC5xx
• Device Core Size: 32b
• Frequency (max): 400MHz
• Total Internal Ram Size: 32KB
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 324
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Freescale Semiconductor
Port Number
Hub Addr
Address
Device
13:12
31:30
29:23
22:16
EndP
Field
Field
DTC
EPS
11:8
Mult
6:0
14
7
I
Table 32-62. Endpoint Characteristics: Queue Head doubleword 1 (continued)
Data Toggle Control (DTC). This bit specifies where the host controller should get the initial data toggle on an
overlay transition.
0 Ignore DT bit from incoming qTD. Host controller preserves DT bit in the queue head.
1 Initial data toggle comes from incoming qTD DT bit. Host controller replaces DT bit in the queue head from
Endpoint Speed. This is the speed of the associated endpoint.
00 Full-Speed (12Mbs)
01 Low-Speed (1.5Mbs)
10 High-Speed (480 Mb/s)
11 Reserved This field must not be modified by the host controller.
Endpoint Number. This 4-bit field selects the particular endpoint number on the device serving as the data
source or sink.
Inactivate on next transaction. This bit is used by system software to request the host controller set the active
bit to zero. This field is only valid when the queue head is in the periodic schedule and the EPS field indicates
a full or low-speed endpoint. Setting this bit to a one when the queue head is in the asynchronous schedule or
the EPS field indicates a high-speed device yields undefined results.
This field selects the specific device serving as the data source or sink.
High-Bandwidth Pipe Multiplier. This field is a multiplier used to key the host controller to the number of
successive packets the host controller may submit to the endpoint in the current execution. The host controller
makes the simplifying assumption that software properly initializes this field (regardless of location of queue
head in the schedules or other run time parameters).
00 Reserved. A zero in this field yields undefined results.
01 One transaction to be issued for this endpoint per micro-frame
10 Two transactions to be issued for this endpoint per micro-frame
11 Three transactions to be issued for this endpoint per micro-frame
This field is ignored by the host controller unless the EPS field indicates a full- or low-speed device. The value
is the port number identifier on the USB 2.0 hub (for hub at device address Hub Addr below), below which the
full- or low-speed device associated with this endpoint is attached. This information is used in the
split-transaction protocol.
This field is ignored by the host controller unless the EPS field indicates a full-or low-speed device. The value
is the USB device address of the USB 2.0 hub below which the full- or low-speed device associated with this
endpoint is attached. This field is used in the split-transaction protocol.
the DT bit in the qTD.
Table 32-63. Endpoint Capabilities: Queue Head doubleword 2
MPC5125 Microcontroller Reference Manual, Rev. 2
Description
Description
Universal Serial Bus Interface with On-The-Go
32-75