MPC5125YVN400 Freescale Semiconductor, MPC5125YVN400 Datasheet - Page 1013

• Manufacturer Part Number: MPC5125YVN400
• Description: IC MCU 32BIT E300 324TEPBGA
• Manufacturer: Freescale Semiconductor
• Series: MPC51xxr

Specifications of MPC5125YVN400

• Core Processor: e300
• Core Size: 32-Bit
• Speed: 400MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, USB OTG
• Peripherals: DMA, WDT
• Number Of I /o: 64
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.33 V ~ 1.47 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 324-PBGA
• Processor Series: MPC51xx
• Core: e300
• Data Bus Width: 32 bit
• Development Tools By Supplier: TWR-MPC5125-KIT, TWR-SER, TWR-ELEV, TOWER
• Maximum Clock Frequency: 400 MHz
• Operating Supply Voltage: 1.4 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Data Ram Size: 32 KB
• I/o Voltage: 3.3 V
• Interface Type: CAN, I2C
• Minimum Operating Temperature: - 40 C
• Program Memory Size: 32 bit
• Cpu Speed: 400MHz
• Embedded Interface Type: CAN, I2C, SPI, UART, USB
• Digital Ic Case Style: TEPBGA
• No. Of Pins: 324
• Rohs Compliant: Yes
• Cpu Family: MPC5xx
• Device Core Size: 32b
• Frequency (max): 400MHz
• Total Internal Ram Size: 32KB
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 324
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Freescale Semiconductor
from Module Base
Address Offset
0x1C–0x7F
0x84–0x8F
0x94–0xFF
0x18–0xFF
0x7C
0x0C
0x0C
0x70
0x74
0x78
0x80
0x90
0x00
0x04
0x08
0x10
0x14
0x00
0x04
0x08
0x10
0x14
0x18
0x00
0x04
MPC5125 Microcontroller Reference Manual, Rev. 2, Release Candidate
OUT CLK0 Clock Configure Register (OUT0CCR)
OUT CLK1 Clock Configure Register (OUT1CCR)
OUT CLK2 Clock Configure Register (OUT2CCR)
OUT CLK3 Clock Configure Register (OUT3CCR)
System Clock Frequency Register 3 (SCFR3)
Reserved
System PLL lock counter (SPLL_LOCK_CNT)
Reserved
PMC Configuration Register (PMC_PMCCR)
PMC Event Register (PMC_PMCER)
PMC Mask Register (PMC_PMCMR)
PMC CORE_PLL Shadow Register (PMC_PMCSR)
PMC Wakeup Source Enable Register (PMC_PMCWSE)
PMC Wakeup Source Polarity Register (PMC_PMCWSP)
Reserved
GPIO Direction Register (GPIO_GPDIR)
GPIO Open Drain Register (GPIO_GPODR)
GPIO Data Register (GPIO_GPDAT)
GPIO Interrupt Event Register (GPIO_GPIER)
GPIO Interrupt Mask Register (GPIO_GPIMR)
GPIO External Interrupt Control Register 1
(GPIO_GPICR1)
GPIO External Interrupt Control Register 2
(GPIO_GPICR2)
Reserved
GPIO Direction Register (GPIO_GPDIR)
GPIO Open Drain Register (GPIO_GPODR)
Table A-2. MPC5125 Detailed Register Map (continued)
Chapter 24, “Power Management Control Module (PMC)”
Power Management Control (PMC) 0xFF40_1000
General Purpose I/O 1 (GPIO1) 0xFF40_1100
General Purpose I/O 2 (GPIO2) 0xFF40_1180
Chapter 16, “General Purpose I/O (GPIO)”
Chapter 16, “General Purpose I/O (GPIO)”
Register
Access Reset Value
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
2
R/W
R/W
R/W
R/W
R/W
R/W
R/W
2
R/W
R/W
R
2
0x000U_UUUU
0xFFFE_0000
0xFFFE_0000
0xFFFE_0000
0xFFFE_0000
0x0000_00FF
0x2860_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
1
Section/Page
5.3.1.23/5-30
5.3.1.24/5-31
5.3.1.25/5-32
5.3.1.26/5-33
5.3.1.27/5-34
5.3.1.28/5-35
24.2.2.1/24-2
24.2.2.2/24-3
24.2.2.3/24-4
24.2.2.4/24-5
24.2.2.5/24-5
24.2.2.6/24-6
16.3.1.1/16-3
16.3.1.2/16-3
16.3.1.3/16-4
16.3.1.4/16-5
16.3.1.5/16-5
16.3.1.6/16-6
16.3.1.6/16-6
16.3.1.1/16-3
16.3.1.2/16-3
Memory Map
A-9