MPC5125YVN400 Freescale Semiconductor, MPC5125YVN400 Datasheet - Page 726

• Manufacturer Part Number: MPC5125YVN400
• Description: IC MCU 32BIT E300 324TEPBGA
• Manufacturer: Freescale Semiconductor
• Series: MPC51xxr

Specifications of MPC5125YVN400

• Core Processor: e300
• Core Size: 32-Bit
• Speed: 400MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, USB OTG
• Peripherals: DMA, WDT
• Number Of I /o: 64
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.33 V ~ 1.47 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 324-PBGA
• Processor Series: MPC51xx
• Core: e300
• Data Bus Width: 32 bit
• Development Tools By Supplier: TWR-MPC5125-KIT, TWR-SER, TWR-ELEV, TOWER
• Maximum Clock Frequency: 400 MHz
• Operating Supply Voltage: 1.4 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Data Ram Size: 32 KB
• I/o Voltage: 3.3 V
• Interface Type: CAN, I2C
• Minimum Operating Temperature: - 40 C
• Program Memory Size: 32 bit
• Cpu Speed: 400MHz
• Embedded Interface Type: CAN, I2C, SPI, UART, USB
• Digital Ic Case Style: TEPBGA
• No. Of Pins: 324
• Rohs Compliant: Yes
• Cpu Family: MPC5xx
• Device Core Size: 32b
• Frequency (max): 400MHz
• Total Internal Ram Size: 32KB
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 324
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Programmable Serial Controller (PSC)
25.5.3
After reset, all PSCs are in UART mode. AC97 mode is chosen by setting the SICR[SIM] equal to 0x3.
The other SICR field should be initialized at the same time. The important registers to configure the PSC
for AC97 mode are:
25-48
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•
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Register
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•
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SICR
CR
CR
Use PSC2 as SPI slave
8-bit data
Clock is active low, CPOL = 0
The first SCK edge is issued at the beginning of the data transfer; CPHA = 1
MSB first
SICR register—select the codec mode
CR register—enable or disable receiver and transmitter
OP0,
PSC in AC97 Mode
OP1
0x0100_9000
register—generate the reset pulse for the external device
Value
0x0A
0x05
MPC5125 Microcontroller Reference Manual, Rev. 2
Disable the Tx and Rx part for configuration if the PSC was enabled by the work before.
Select the 8bit Codec SPI slave mode, MSB first, CPOL = 0; CPHA = 1
Enable Tx and Rx
Table 25-36. 8-bit SPI Slave Mode for PSC2
Setting
Freescale Semiconductor