MPC5125YVN400 Freescale Semiconductor, MPC5125YVN400 Datasheet - Page 715

• Manufacturer Part Number: MPC5125YVN400
• Description: IC MCU 32BIT E300 324TEPBGA
• Manufacturer: Freescale Semiconductor
• Series: MPC51xxr

Specifications of MPC5125YVN400

• Core Processor: e300
• Core Size: 32-Bit
• Speed: 400MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, USB OTG
• Peripherals: DMA, WDT
• Number Of I /o: 64
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.33 V ~ 1.47 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 324-PBGA
• Processor Series: MPC51xx
• Core: e300
• Data Bus Width: 32 bit
• Development Tools By Supplier: TWR-MPC5125-KIT, TWR-SER, TWR-ELEV, TOWER
• Maximum Clock Frequency: 400 MHz
• Operating Supply Voltage: 1.4 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Data Ram Size: 32 KB
• I/o Voltage: 3.3 V
• Interface Type: CAN, I2C
• Minimum Operating Temperature: - 40 C
• Program Memory Size: 32 bit
• Cpu Speed: 400MHz
• Embedded Interface Type: CAN, I2C, SPI, UART, USB
• Digital Ic Case Style: TEPBGA
• No. Of Pins: 324
• Rohs Compliant: Yes
• Cpu Family: MPC5xx
• Device Core Size: 32b
• Frequency (max): 400MHz
• Total Internal Ram Size: 32KB
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 324
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

The receiver detects the beginning of a break in the middle of a character, if the break persists through the
next character time.
25.5.1.5
The TimeOut counter is available during UART mode only. If this behavior is enabled then an internal
counter can generate an interrupt if the time after the last received data word is bigger then the programmed
limit. The first received data word after enabling this behavior will start the counter. A receive data word
before the counter reach the limit will clear the counter value and starts the counter again. The value in the
register defines the time base on number of clock events for the programmed UART clock source (32 or
10 clock events per bit depend on the selected prescaler).
25.5.1.6
Table 25-28
not the other configure values like interrupt and FIFO configurations. PSC module registers can be
accessed by word or byte operations.
Freescale Semiconductor
•
•
•
Register
CTUR
CTLR
SICR
CSR
MR1
MR2
IMR
CR
CR
If a break condition is detected (RxD is low for the entire character including the stop bit), a
character of all zeros is loaded into the receiver shift register and SR[RB] is set. RxD must return
to a high condition for at least one-half bit-time before a search for the next start bit begins.
If the break begins in the middle of a character, the receiver places the damaged character in the
Rx FIFO stack and sets the corresponding SR error bit.
If the break lasts until the next character time, the receiver places an all zero character into the Rx
FIFO and sets SR[RB].
shows the configuration sequences. This list includes the UART mode related registers only,
TimeOut Counter Behavior
Configuration Sequence for UART Mode
0x0000_0000
0x0800_0000
0xXXXX
0xDD00
Table 25-28. General Configuration Sequence for UART Mode
Value
0xXX
0xXX
0xD7
0x0A
0x00
0x05
or
MPC5125 Microcontroller Reference Manual, Rev. 2
Disable the Tx and Rx part for configuration if the PSC was enabled by the work
before.
Select the clock source
Select the UART mode
Select error mode, parity mode, and the parity type
Select channel mode, port control, and stop-bit length
Set the calculated baudrate depend on the IP bus clock
Select the desired interrupt
Enable Tx and Rx
Setting
Programmable Serial Controller (PSC)
25-37