MPC5125YVN400 Freescale Semiconductor, MPC5125YVN400 Datasheet - Page 926

• Manufacturer Part Number: MPC5125YVN400
• Description: IC MCU 32BIT E300 324TEPBGA
• Manufacturer: Freescale Semiconductor
• Series: MPC51xxr

Specifications of MPC5125YVN400

• Core Processor: e300
• Core Size: 32-Bit
• Speed: 400MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, USB OTG
• Peripherals: DMA, WDT
• Number Of I /o: 64
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.33 V ~ 1.47 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 324-PBGA
• Processor Series: MPC51xx
• Core: e300
• Data Bus Width: 32 bit
• Development Tools By Supplier: TWR-MPC5125-KIT, TWR-SER, TWR-ELEV, TOWER
• Maximum Clock Frequency: 400 MHz
• Operating Supply Voltage: 1.4 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Data Ram Size: 32 KB
• I/o Voltage: 3.3 V
• Interface Type: CAN, I2C
• Minimum Operating Temperature: - 40 C
• Program Memory Size: 32 bit
• Cpu Speed: 400MHz
• Embedded Interface Type: CAN, I2C, SPI, UART, USB
• Digital Ic Case Style: TEPBGA
• No. Of Pins: 324
• Rohs Compliant: Yes
• Cpu Family: MPC5xx
• Device Core Size: 32b
• Frequency (max): 400MHz
• Total Internal Ram Size: 32KB
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 324
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Universal Serial Bus Interface with On-The-Go
Async Sched Active
This state is entered from the Async Sched Not Active state when the periodic schedule is not active. It is
also entered from the Async Sched Sleeping states when the AsynchronousTraversalSleepTimer expires.
On every transition into this state, the host controller sets the Reclamation bit in the USB_USBSTS
register to a one.
While in this state, the host controller continually traverses the asynchronous schedule until either the end
of micro-frame or an empty list condition is detected.
Async Sched Sleeping
The state is entered from the Async Sched Active state when a schedule empty condition is detected. On
entry to this state, the host controller sets the AsynchronousTraversalSleepTimer to
AsyncSchedSleepTime.
32.6.7.4.2
The derivation is based on analysis of what work the host controller could be doing next. It assumes the
host controller does not keep any state about what work is possibly pending in the asynchronous schedule.
The schedule could contain any mix of the possible combinations of high- full- or low-speed control and
bulk requests.
schedule, and the amount of time (e.g., footprint, or wall clock) the transaction takes to complete.
An AsyncSchedSleepTime value of 10 ms provides a reasonable relaxation of the system memory load
and provides a good level of service for the various transfer types and payload sizes. For example, say you
detect an empty list after issuing a start-split for a 64-byte full-speed bulk request. Assuming this is the
only thing in the list, the host controller receives the results of the full-speed transaction from the hub
during the fifth complete-split request. If the full-speed transaction was an IN and it nak'd, the 10 ms sleep
period would allow the host controller to get the NAK results on the first complete-split.
32-98
Transaction Attributes Footprint (time)
Type: Control
Speed: HS
Speed: HS
Speed: FS
Speed: FS
Type: Bulk
Size: 512
Size: 512
Size: 64
Size: 8
Table 32-72
Example Derivation for AsyncSchedSleepTime
Approx. 50 µs
Approx. 12 µs
Table 32-72. Typical Low-/Full Speed Transaction Times
11.9 µs
9.45 µs
summarizes some of the typical “next transactions” that could be in the
MPC5125 Microcontroller Reference Manual, Rev. 2
Maximum foot print for a worst case, full sized bulk data.
Maximum foot print for a best case, full sized bulk data.
Approximate, typical for full sized bulk data.
Approximate, typical for 8 byte bulk/control (e.g., setup)
Description
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