MPC5125YVN400 Freescale Semiconductor, MPC5125YVN400 Datasheet - Page 659

• Manufacturer Part Number: MPC5125YVN400
• Description: IC MCU 32BIT E300 324TEPBGA
• Manufacturer: Freescale Semiconductor
• Series: MPC51xxr

Specifications of MPC5125YVN400

• Core Processor: e300
• Core Size: 32-Bit
• Speed: 400MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, USB OTG
• Peripherals: DMA, WDT
• Number Of I /o: 64
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.33 V ~ 1.47 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 324-PBGA
• Processor Series: MPC51xx
• Core: e300
• Data Bus Width: 32 bit
• Development Tools By Supplier: TWR-MPC5125-KIT, TWR-SER, TWR-ELEV, TOWER
• Maximum Clock Frequency: 400 MHz
• Operating Supply Voltage: 1.4 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Data Ram Size: 32 KB
• I/o Voltage: 3.3 V
• Interface Type: CAN, I2C
• Minimum Operating Temperature: - 40 C
• Program Memory Size: 32 bit
• Cpu Speed: 400MHz
• Embedded Interface Type: CAN, I2C, SPI, UART, USB
• Digital Ic Case Style: TEPBGA
• No. Of Pins: 324
• Rohs Compliant: Yes
• Cpu Family: MPC5xx
• Device Core Size: 32b
• Frequency (max): 400MHz
• Total Internal Ram Size: 32KB
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 324
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

23.8.4
Normally, read out data goes valid after the H → L transition of RE, and invalid on the L → H transition
t
Some flash devices have the EDO (enhanced data out) feature, the data can be held until the next RE
H → L transition, t
To support the EDO feature, NFC must work in fast mode: set FAST_FLASH = 1,
Configuration register (FLASH_CONFIG).”
> 33 MHz) according to the data sheet of flash devices.
23.8.5
Pages on the flash can be split into multiple ECC/DMA pages. The parameter that controls this is
PAGE_CNT[3:0] in the FLASH_CONFIG register. This parameter gives the number of virtual,
ECC/DMA pages in one flash page. See
(FLASH_CONFIG),”
The virtual page itself is split in user area and ECC area. Data in the user area can be set or used by the
application. Data in the ECC area is set and used by the ECC.
The following tables give virtual-to-physical mappings for various flash devices and their recommended
settings.
Freescale Semiconductor
RHOH
< t
0
REH
Fast Flash Configuration for EDO
Organization of Data in the NAND Flash
996 bytes boot codes
.
RHOH
Figure 23-26. Boot data’s location in a page of different size flash
for more details.
0x07CC
0x07CA
0x07C6
0x07C8
0x083E
0x0000
0x0002
0x0004
......
......
> t
REH
MPC5125 Microcontroller Reference Manual, Rev. 2
16-bit flash boot codes and ECC’s location in a page
.
8-bit flash boot codes and ECC’s location in a page
60 bytes ECC
[15:8]
(inverted)
XX
XX
XX
XX
XX
XX
XX
XX
...
...
...
...
Section 23.7.13, “Flash Configuration register
The flash_clk should be configured fast enough (usually
1056
ECC byte 59 (inverted)
ECC byte 0 (inverted)
ECC byte 1 (inverted)
ECC byte j (inverted)
boot code byte 995
boot code byte 0
boot code byte 1
boot code byte i
[7:0]
...
...
...
...
Unused
Section 23.7.13, “Flash
NAND Flash Controller (NFC)
23-29