MPC5125YVN400 Freescale Semiconductor, MPC5125YVN400 Datasheet - Page 854

• Manufacturer Part Number: MPC5125YVN400
• Description: IC MCU 32BIT E300 324TEPBGA
• Manufacturer: Freescale Semiconductor
• Series: MPC51xxr

Specifications of MPC5125YVN400

• Core Processor: e300
• Core Size: 32-Bit
• Speed: 400MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, USB OTG
• Peripherals: DMA, WDT
• Number Of I /o: 64
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.33 V ~ 1.47 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 324-PBGA
• Processor Series: MPC51xx
• Core: e300
• Data Bus Width: 32 bit
• Development Tools By Supplier: TWR-MPC5125-KIT, TWR-SER, TWR-ELEV, TOWER
• Maximum Clock Frequency: 400 MHz
• Operating Supply Voltage: 1.4 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Data Ram Size: 32 KB
• I/o Voltage: 3.3 V
• Interface Type: CAN, I2C
• Minimum Operating Temperature: - 40 C
• Program Memory Size: 32 bit
• Cpu Speed: 400MHz
• Embedded Interface Type: CAN, I2C, SPI, UART, USB
• Digital Ic Case Style: TEPBGA
• No. Of Pins: 324
• Rohs Compliant: Yes
• Cpu Family: MPC5xx
• Device Core Size: 32b
• Frequency (max): 400MHz
• Total Internal Ram Size: 32KB
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 324
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Universal Serial Bus Interface with On-The-Go
32.2.4.4
In host mode, the controller uses the USB Frame Index (USB_FRINDEX) register to index the periodic
frame list. The register updates every 125 microseconds (once each microframe). Bits [N–3] select a
particular entry in the periodic frame list during periodic schedule execution. The number of bits used for
the index depends on the size of the frame list as set by system software in the frame list size field in the
USB_USBCMD register.
This register must be written as a 32-bit word. Byte writes produce-undefined results. This register cannot
be written unless the OTG controller is in the halted state as indicated by the HCHalted bit. A write to this
register while the run/stop hit is set to a 1 produces undefined results. Writes to this register also affect the
SOF value.
In device mode, this register is read-only, and the OTG controller updates the USB_FRINDEX[13–3]
register from the frame number indicated by the SOF marker. When a SOF is received by the USB bus,
USB_FRINDEX[13–3] is checked against the SOF marker. If USB_FRINDEX[13–3] is different from the
SOF marker, USB_FRINDEX[13–3] is set to the SOF value and USB_FRINDEX[2–0] is set to 0 (that is,
SOF for 1 msec frame). If USB_FRINDEX[13–3] is equal to the SOF value, USB_FRINDEX[2–0] is
incremented (that is, SOF for 125 µsec microframe.)
Table 32-19
when used in host mode.
32-26
Field
UE
illustrates values of N based on the value of the frame list size in the USB_USBCMD register
USB Frame Index (USB_FRINDEX) Register
USB Interrupt Enable. When this bit is a 1 and the USBINT bit in the USB_USBSTS register is a 1, the OTG
controller issues an interrupt at the next interrupt threshold. The interrupt is acknowledged by software
clearing the USBINT bit.
0 Disabled.
1 Enabled.
USB_USBCMD[FS]
Table 32-18. USB_USBINTR field descriptions (continued)
000
001
010
011
100
101
110
111
MPC5125 Microcontroller Reference Manual, Rev. 2
Table 32-19. USB_FRINDEX N Values
1024 elements (4096 bytes)
512 elements (2048 bytes)
256 elements (1024 bytes)
128 elements (512 bytes)
64 elements (256 bytes)
32 elements (128 bytes)
16 elements (64 bytes)
8 elements (32 bytes)
Frame List Size
Description
USB_FRINDEX N Value
12
11
10
9
8
7
6
5
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