MPC5125YVN400 Freescale Semiconductor, MPC5125YVN400 Datasheet - Page 623

• Manufacturer Part Number: MPC5125YVN400
• Description: IC MCU 32BIT E300 324TEPBGA
• Manufacturer: Freescale Semiconductor
• Series: MPC51xxr

Specifications of MPC5125YVN400

• Core Processor: e300
• Core Size: 32-Bit
• Speed: 400MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, USB OTG
• Peripherals: DMA, WDT
• Number Of I /o: 64
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.33 V ~ 1.47 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 324-PBGA
• Processor Series: MPC51xx
• Core: e300
• Data Bus Width: 32 bit
• Development Tools By Supplier: TWR-MPC5125-KIT, TWR-SER, TWR-ELEV, TOWER
• Maximum Clock Frequency: 400 MHz
• Operating Supply Voltage: 1.4 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Data Ram Size: 32 KB
• I/o Voltage: 3.3 V
• Interface Type: CAN, I2C
• Minimum Operating Temperature: - 40 C
• Program Memory Size: 32 bit
• Cpu Speed: 400MHz
• Embedded Interface Type: CAN, I2C, SPI, UART, USB
• Digital Ic Case Style: TEPBGA
• No. Of Pins: 324
• Rohs Compliant: Yes
• Cpu Family: MPC5xx
• Device Core Size: 32b
• Frequency (max): 400MHz
• Total Internal Ram Size: 32KB
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 324
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

22.4.7
22.4.7.1
The MSCAN module behaves as described within this specification in all normal modes.
22.4.7.2
The MSCAN is put into initialization mode when INITRQ = 1 and INITAK = 0.
22.4.7.3
The MSCAN is put into sleep mode When SLPRQ = 1 and SLPAK = 1.
22.4.7.4
The MSCAN is put into power down mode when Power Architecture goes into deep sleep mode.
22.4.7.5
In an optional bus monitoring mode (listen-only), the CAN node can receive valid data frames and valid
remote frames, but it sends only recessive bits on the CAN bus. In addition, it cannot start a transmission.
If the MAC sub-layer is required to send a dominant bit (ACK bit, overload flag, active error flag), the bit
is rerouted internally so the MAC sub-layer monitors this dominant bit; although, the CAN bus may
remain in recessive state externally.
22.4.8
If the MSCAN is disabled (CANE = 0), the MSCAN clocks are stopped for power savings.
If the MSCAN is enabled (CANE = 1), the MSCAN has two additional modes with reduced power
consumption, compared to normal mode: sleep and power down mode. In sleep mode, power consumption
is reduced by stopping all clocks except those to access the registers from the Power Architecture side. In
power down mode, all clocks are stopped and no power is consumed.
Table 22-33
settings on the SLPRQ/SLPAK bits.
For all modes, an MSCAN wake-up interrupt can only occur if the MSCAN is in sleep mode (SLPRQ = 1
and SLPAK = 1), wake-up functionality is enabled (WUPE = 1), and the wake-up interrupt is enabled
(WUPIE = 1).
Freescale Semiconductor
Modes of Operation
Low Power Options
summarizes the MSCAN modes. A particular combination of modes is entered by the given
Normal Mode
Initialization Mode
Sleep mode
Power down mode
Listen-Only Mode
MPC5125 Microcontroller Reference Manual, Rev. 2
MSCAN
22-45