MPC5125YVN400 Freescale Semiconductor, MPC5125YVN400 Datasheet - Page 337

• Manufacturer Part Number: MPC5125YVN400
• Description: IC MCU 32BIT E300 324TEPBGA
• Manufacturer: Freescale Semiconductor
• Series: MPC51xxr

Specifications of MPC5125YVN400

• Core Processor: e300
• Core Size: 32-Bit
• Speed: 400MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, USB OTG
• Peripherals: DMA, WDT
• Number Of I /o: 64
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.33 V ~ 1.47 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 324-PBGA
• Processor Series: MPC51xx
• Core: e300
• Data Bus Width: 32 bit
• Development Tools By Supplier: TWR-MPC5125-KIT, TWR-SER, TWR-ELEV, TOWER
• Maximum Clock Frequency: 400 MHz
• Operating Supply Voltage: 1.4 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Data Ram Size: 32 KB
• I/o Voltage: 3.3 V
• Interface Type: CAN, I2C
• Minimum Operating Temperature: - 40 C
• Program Memory Size: 32 bit
• Cpu Speed: 400MHz
• Embedded Interface Type: CAN, I2C, SPI, UART, USB
• Digital Ic Case Style: TEPBGA
• No. Of Pins: 324
• Rohs Compliant: Yes
• Cpu Family: MPC5xx
• Device Core Size: 32b
• Frequency (max): 400MHz
• Total Internal Ram Size: 32KB
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 324
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

12.3.2
12.3.2.1
Freescale Semiconductor
1
Address: Base + 0x0080
Look-up table input is running average of the number of acks for the self channel counted over the grant total of the last N acks.
ACK_COUNT[2:0] controls the parameter N.
ACK_COUNTn [3:0]
Reset
Reset
W
W
R
R
LUT SELn
Field
16
0
0
0
0
Register Descriptions
ACK_COUNT3[2:0]
Priority Manager Configuration 1 Register (PRIOMAN_CONFIG1)
Figure 12-2. Priority Manager Configuration 1 Register (PRIOMAN_CONFIG1)
17
0
0
1
1
SEL4[1:0]
18
Lookup Table Select. Selects between primary and secondary Look-Up table configuration register.
00 Select main look-up table configuration register.
01 Select alternate look-up table configuration register.
10 Select alternate look-Up table configuration register if congested flag is set. See
11 Select alternate look-up table configuration register if DIU incoming priority bit 3 is high. The
Configuration fields. One for every channel. Determines how many requests the number of ACKs for
the self-channel is counted.
0000 1 ACK is counted.
0001 2 ACKs are counted.
0010 3 ACKs are counted.
0011 4 ACKs are counted.
0100 6 ACKs are counted.
0101 8 ACKs are counted.
0110 12 ACKs are counted.
0111 16 ACKs are counted.
1000 24 ACKs are counted.
1001 32 ACKs are counted.
1010 48 ACKs are counted.
1011 63 ACKs are counted.
0
1
2
LUT
Section 12.3.2.3, “High Priority Configuration Register (HIPRIO_CONFIG).”
switch for all tables is based on the DIU flag. If LUT_SELn = 11, the e300 table switches to the
alternate table if the DIU flag is set.
Table 12-2. PRIOMAN_CONFIG1 field descriptions
19
0
1
3
MPC5125 Microcontroller Reference Manual, Rev. 2
SEL3[1:0]
20
4
0
0
ACK_COUNT2[3:0]
LUT
21
0
1
5
1
SEL2[1:0]
22
0
1
6
LUT
23
0
1
7
SEL1[1:0]
Description
24
8
0
0
ACK_COUNT1[3:0]
LUT
25
9
0
1
Multi-port DRAM Controller Priority Manager
SEL0[1:0]
10
26
0
1
LUT
11
27
0
1
12
28
0
0
Access: User read/write
ACK_COUNT0[3:0]
ACK_COUNT4[3:0]
13
29
1
1
14
30
1
1
15
31
12-5
1
1