MPC5125YVN400 Freescale Semiconductor, MPC5125YVN400 Datasheet - Page 478

IC MCU 32BIT E300 324TEPBGA

MPC5125YVN400

Manufacturer Part Number
MPC5125YVN400
Description
IC MCU 32BIT E300 324TEPBGA
Manufacturer
Freescale Semiconductor
Series
MPC51xxr

Specifications of MPC5125YVN400

Core Processor
e300
Core Size
32-Bit
Speed
400MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, USB OTG
Peripherals
DMA, WDT
Number Of I /o
64
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.33 V ~ 1.47 V
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
324-PBGA
Processor Series
MPC51xx
Core
e300
Data Bus Width
32 bit
Development Tools By Supplier
TWR-MPC5125-KIT, TWR-SER, TWR-ELEV, TOWER
Maximum Clock Frequency
400 MHz
Operating Supply Voltage
1.4 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Data Ram Size
32 KB
I/o Voltage
3.3 V
Interface Type
CAN, I2C
Minimum Operating Temperature
- 40 C
Program Memory Size
32 bit
Cpu Speed
400MHz
Embedded Interface Type
CAN, I2C, SPI, UART, USB
Digital Ic Case Style
TEPBGA
No. Of Pins
324
Rohs Compliant
Yes
Cpu Family
MPC5xx
Device Core Size
32b
Frequency (max)
400MHz
Total Internal Ram Size
32KB
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
324
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MPC5125YVN400
Manufacturer:
Freescale Semiconductor
Quantity:
135
Part Number:
MPC5125YVN400
Manufacturer:
LTC
Quantity:
29
Part Number:
MPC5125YVN400
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Integrated Programmable Interrupt Controller (IPIC)
18-30
Address: Base + 0x50
USB2OTG1
USB2OTG2
Reset
Reset
MSCAN1
SDHC2
SDHC1
GPT10
GPT11
FIFOC
PSC4
PSC5
PSC6
PSC7
PSC8
PSC9
GPT8
GPT9
FEC1
FEC2
Field
NFC
I2C1
I2C2
I2C3
LPC
W
W
R
R GPT1
PSC4 PSC5 PSC6 PSC7 PSC8 PSC9 GPT8 GPT9 FIFOC
16
0
0
0
0
Figure 18-21. System Internal Interrupt Force Registers High (IPIC_SIFCR_H)
GPT1
Each bit corresponds to an interrupt source. Force an interrupt by setting the IPIC_SIFCRx bit. An interrupt
can be enabled by setting the corresponding IPIC_SIFCRx bit.
Note: IPIC_SIFCRx bit positions are not changed according to their relative priority.
17
0
1
0
1
SDH
C2
18
0
0
2
FEC1 FEC2 NFC
19
0
0
3
MPC5125 Microcontroller Reference Manual, Rev. 2
Table 18-22. IPIC_SIFCR_H field descriptions
20
4
0
0
21
0
0
5
LPC
22
0
0
6
SDHC
23
0
1
0
7
Description
I2C1
24
8
0
0
I2C2
25
9
0
0
0
I2C3
10
26
0
0
0
OTG1
USB2
MSC
AN1
11
27
0
0
OTG2
USB2
MSC
AN2
12
28
0
0
Freescale Semiconductor
Access: User read/write
BDLC GPT0 GPT1
13
29
0
0
0
14
30
0
0
0
15
31
0
0
0

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