MPC5125YVN400 Freescale Semiconductor, MPC5125YVN400 Datasheet - Page 394

IC MCU 32BIT E300 324TEPBGA

MPC5125YVN400

Manufacturer Part Number
MPC5125YVN400
Description
IC MCU 32BIT E300 324TEPBGA
Manufacturer
Freescale Semiconductor
Series
MPC51xxr

Specifications of MPC5125YVN400

Core Processor
e300
Core Size
32-Bit
Speed
400MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, USB OTG
Peripherals
DMA, WDT
Number Of I /o
64
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.33 V ~ 1.47 V
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
324-PBGA
Processor Series
MPC51xx
Core
e300
Data Bus Width
32 bit
Development Tools By Supplier
TWR-MPC5125-KIT, TWR-SER, TWR-ELEV, TOWER
Maximum Clock Frequency
400 MHz
Operating Supply Voltage
1.4 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Data Ram Size
32 KB
I/o Voltage
3.3 V
Interface Type
CAN, I2C
Minimum Operating Temperature
- 40 C
Program Memory Size
32 bit
Cpu Speed
400MHz
Embedded Interface Type
CAN, I2C, SPI, UART, USB
Digital Ic Case Style
TEPBGA
No. Of Pins
324
Rohs Compliant
Yes
Cpu Family
MPC5xx
Device Core Size
32b
Frequency (max)
400MHz
Total Internal Ram Size
32KB
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
324
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Fast Ethernet Controller (FEC)
The first word of the RXBD contains control and status bits. Its format is detailed in
14-38
Field
RO1
RO2
MC
NO
CR
BC
LG
W
M
E
L
Offset + 0
Offset + 2
Offset + 4
Offset + 6
Empty, written by the FEC (=0) and user (=1).
0 The data buffer associated with this BD has been filled with received data or data reception has been aborted due
1 The data buffer associated with this BD is empty or reception is currently in progress.
Receive software ownership bit
This field is reserved for use by software. This read/write bit must not be modified by hardware. Its value does not
affect hardware.
Wrap, written by user.
0 The next buffer descriptor is found in the consecutive location
1 The next buffer descriptor is found at the location defined in R_DES_START.
Receive software ownership bit
This field is reserved for use by software. This read/write bit must not be modified by hardware. Its value does not
affect hardware.
Last in frame, written by the FEC.
0 The buffer is not the last in a frame.
1 The buffer is the last in a frame.
Miss, written by the FEC.
This bit is set by the FEC for frames that were accepted in promiscuous mode, but were flagged as a miss by the
internal address recognition. Therefore, while in promiscuous mode, you can use the M bit to determine whether the
frame was destined to this station. This bit is valid only if the L and the PROM bits are set.
0 The frame was received because of an address recognition hit.
1 The frame was received because of promiscuous mode.
Set if the DA is broadcast (FF-FF-FF-FF-FF-FF).
Set if the DA is multicast and not broadcast.
RX frame length violation, written by the FEC.
A frame length greater than ETH_R_CNTRL[MAX_FL] was recognized. This bit is valid only if the L bit is set. The
receive data is not altered in any way unless the length exceeds 2047 bytes.
RX non-octet aligned frame, written by the FEC.
A frame that contains a number of bits not divisible by 8 was received, and the CRC check that occurred at the
preceding byte boundary generated an error. This bit is valid only if the L bit is set. If this bit is set, the CR bit is not set.
RX CRC error, written by the FEC.
This frame contains a CRC error and is an integral number of octets in length. This bit is valid only if the l bit is set.
to an error condition. The status and length fields have been updated as required.
15
E
RO1
14
Table 14-32. RxBD — Receive Buffer Field Descriptions
Figure 14-28. RxBD — Receive Buffer Descriptor
13
W
MPC5125 Microcontroller Reference Manual, Rev. 2
RO2
12
11
L
RX Data Buffer Pointer — A[31:16]
RX Data Buffer Pointer — A[15:0]
10
9
Description
Data Length
8
M
BC
7
MC
6
LG
5
NO
4
3
CR
2
Freescale Semiconductor
Table
OV
1
14-32.
TR
0

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