MPC5125YVN400 Freescale Semiconductor, MPC5125YVN400 Datasheet - Page 951

• Manufacturer Part Number: MPC5125YVN400
• Description: IC MCU 32BIT E300 324TEPBGA
• Manufacturer: Freescale Semiconductor
• Series: MPC51xxr

Specifications of MPC5125YVN400

• Core Processor: e300
• Core Size: 32-Bit
• Speed: 400MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, USB OTG
• Peripherals: DMA, WDT
• Number Of I /o: 64
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.33 V ~ 1.47 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 324-PBGA
• Processor Series: MPC51xx
• Core: e300
• Data Bus Width: 32 bit
• Development Tools By Supplier: TWR-MPC5125-KIT, TWR-SER, TWR-ELEV, TOWER
• Maximum Clock Frequency: 400 MHz
• Operating Supply Voltage: 1.4 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Data Ram Size: 32 KB
• I/o Voltage: 3.3 V
• Interface Type: CAN, I2C
• Minimum Operating Temperature: - 40 C
• Program Memory Size: 32 bit
• Cpu Speed: 400MHz
• Embedded Interface Type: CAN, I2C, SPI, UART, USB
• Digital Ic Case Style: TEPBGA
• No. Of Pins: 324
• Rohs Compliant: Yes
• Cpu Family: MPC5xx
• Device Core Size: 32b
• Frequency (max): 400MHz
• Total Internal Ram Size: 32KB
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 324
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Periodic Interrupt—Do-Start-Split
This is the state software must initialize a full- or low-speed interrupt queue head StartXState bit. This state
is entered from the Do_Complete Split state only after the split transaction is complete. This occurs when
one of the following events occur:
Each time the host controller visits a queue head in this state (within the execute transaction state), bit-wise
ANDs QH[S-mask] with cMicroFrameBit to determine whether to execute a start-split. If the result is
non-zero, the host controller issues a start-split transaction. If the PID Code field indicates an IN
transaction, the host controller must zero-out the QH[S-bytes] field. After the split-transaction has been
executed, the host controller sets up state in the queue head to track the progress of the complete-split phase
of the split transaction. Specifically, it records the expected frame number into QH[FrameTag] field, sets
C-prog-mask to zero (0x00), and exits this state. The host controller must not adjust the value of Cerr as a
result of completion of a start-split transaction.
Freescale Semiconductor
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NAK. A NAK response is a propagation of the full- or low-speed endpoint's NAK response.
ACK. An ACK response is a propagation of the full- or low-speed endpoint's ACK response. Only
occurs on an OUT endpoint.
DATA 0/1. Only occurs for INs. Indicates this is the last of the data from the endpoint for this split
transaction.
ERR. The transaction on the low-/full-speed link below the transaction translator had a failure (for
example, timeout, bad CRC, etc.).
NYET (and Last). The host controller issued the last complete-split and the transaction translator
responded with a NYET handshake. This means the start-split was not correctly received by the
transaction translator, so it never executed a transaction to the full- or low-speed endpoint, see
Section 32.6.11.2, “Split Transaction Interrupt.”
CERR –– > 0
Data Loss
Babble
STALL
.or.
.or.
.or.
Queue
State
Halt
Figure 32-67. Split Transaction State Machine for Interrupt
Queue
Active
State
MPC5125 Microcontroller Reference Manual, Rev. 2
Transaction
Complete
MDATA
NYET
Split
.or.
cMicroFrameBit)
!(QH.S-Mask &
Complete-
Start-
Split
Split
Do
Do
XactErr
cMicroFrameBit)
(QH.S-Mask &
* Issue Start-Split Transaction
* Tag QH with Frame Number According
* QH.C-prog-mask = zero(0x00)
to the Frame Tag Rules **(1,3)
Decrement Error Counter (CERR)
* Issue Complete-Split Transaction
* Tag QH with Frame Number According
* C-prog-mask |= cMicroFrameBit
to the **Sframe Tag Rules
and Do Immediate Retry
(USB_FRINDEX[7:3] .eq. QH.FrameTag)
of Complete-Split
CheckPreviousBit(QH.C-prog-mask,
(QH.C-Mask & cMicroFrameBit)
Universal Serial Bus Interface with On-The-Go
QH.C-Mask, cMicroFrameBit)
.and.
.and.
32-123