MPC5125YVN400 Freescale Semiconductor, MPC5125YVN400 Datasheet - Page 563

IC MCU 32BIT E300 324TEPBGA

MPC5125YVN400

Manufacturer Part Number
MPC5125YVN400
Description
IC MCU 32BIT E300 324TEPBGA
Manufacturer
Freescale Semiconductor
Series
MPC51xxr

Specifications of MPC5125YVN400

Core Processor
e300
Core Size
32-Bit
Speed
400MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, USB OTG
Peripherals
DMA, WDT
Number Of I /o
64
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.33 V ~ 1.47 V
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
324-PBGA
Processor Series
MPC51xx
Core
e300
Data Bus Width
32 bit
Development Tools By Supplier
TWR-MPC5125-KIT, TWR-SER, TWR-ELEV, TOWER
Maximum Clock Frequency
400 MHz
Operating Supply Voltage
1.4 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Data Ram Size
32 KB
I/o Voltage
3.3 V
Interface Type
CAN, I2C
Minimum Operating Temperature
- 40 C
Program Memory Size
32 bit
Cpu Speed
400MHz
Embedded Interface Type
CAN, I2C, SPI, UART, USB
Digital Ic Case Style
TEPBGA
No. Of Pins
324
Rohs Compliant
Yes
Cpu Family
MPC5xx
Device Core Size
32b
Frequency (max)
400MHz
Total Internal Ram Size
32KB
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
324
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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TSIZ bits can be enabled for every mode, but the TSIZ bits only make sense for the byte addressing mode.
The low address bits, are not available in the short or word addressing mode. Only TSIZEs of 1, 2, or 4 are
supported.
TSIZ[1:0] are driven as follows:
Other values are invalid and should not be required by the external device.
Table 21-26
the swap bits - WS and RS of Chip Select X Configuration Register - is shown.
Freescale Semiconductor
WS or RS set
Swap
Table 21-25. Internal Data and Address Bus Assignment to External Signals in Non-Muxed Mode
01 = Transaction is 1 byte
10 = Transaction is 2 bytes
00 = Transaction is 4 bytes
AD[31:24]
AD[23:16]
AX[09:08]
AX[07:00]
AD[15:8]
AD[7:0]
Signal
Name
and
The 24-bit data width is not supported.
The total pin number also requires the addition of the control signals CS,
R/W, ACK, OE, TS (programmable), and TSIZ (programmable) where
available.
Transfer
Table 21-27
Data Size
Size
32
32
Table 21-26. Aligned Data Transfers for 32-Bit Data Bus Width
address[31:24]
address[23:16]
address[15:8]
address[7:0]
TSIZ[1:0]
Data Bus
data[7:0]
8-Bit
describes the various combinations of TSIZ. In addition also the influence of
0
MPC5125 Microcontroller Reference Manual, Rev. 2
Bus Width
Address
Table 21-24. Non-Muxed Mode Options
10
10
Address[1:0]
address[25:24]
address[23:16]
address[15:8]
Addressing
address[7:0]
Byte
Pins Used
16-Bit Data Bus
data[15:8]
42
42
data[7:0]
NOTE
AD[31:24]
address[26:25]
address[24:17]
address[16:9]
Addressing
address[8:1]
Memory Size
Short
4 KB
1 KB
AD[23:16]
Addressing
address[9:8]
address[7:0]
Word addressing
Byte addressing
Data Lanes
Byte
Comments
32-Bit Data Bus
data[31:24]
data[23:16]
data[15:8]
data[7:0]
LocalPlus Bus Controller (LPC)
AD[15:8]
address[11:10]
Addressing
address[9:2]
Word
AD[7:0]
21-23

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