MPC5125YVN400 Freescale Semiconductor, MPC5125YVN400 Datasheet - Page 335

• Manufacturer Part Number: MPC5125YVN400
• Description: IC MCU 32BIT E300 324TEPBGA
• Manufacturer: Freescale Semiconductor
• Series: MPC51xxr

Specifications of MPC5125YVN400

• Core Processor: e300
• Core Size: 32-Bit
• Speed: 400MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, USB OTG
• Peripherals: DMA, WDT
• Number Of I /o: 64
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.33 V ~ 1.47 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 324-PBGA
• Processor Series: MPC51xx
• Core: e300
• Data Bus Width: 32 bit
• Development Tools By Supplier: TWR-MPC5125-KIT, TWR-SER, TWR-ELEV, TOWER
• Maximum Clock Frequency: 400 MHz
• Operating Supply Voltage: 1.4 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Data Ram Size: 32 KB
• I/o Voltage: 3.3 V
• Interface Type: CAN, I2C
• Minimum Operating Temperature: - 40 C
• Program Memory Size: 32 bit
• Cpu Speed: 400MHz
• Embedded Interface Type: CAN, I2C, SPI, UART, USB
• Digital Ic Case Style: TEPBGA
• No. Of Pins: 324
• Rohs Compliant: Yes
• Cpu Family: MPC5xx
• Device Core Size: 32b
• Frequency (max): 400MHz
• Total Internal Ram Size: 32KB
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 324
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Freescale Semiconductor
PRIOMAN_BASE
(0xFF40_9000)
Offset from
0x00CC
0x00DC
0x00AC
0x00BC
0x00EC
0x00A0
0x00A4
0x00A8
0x00B0
0x00B4
0x00B8
0x00C0
0x00C4
0x00C8
0x00D0
0x00D4
0x00D8
0x00E0
0x00E4
0x00E8
0x010C
0x00F0
0x00F4
0x0100
0x0104
0x0108
1
Look-Up Table 0 Main Lower (LUT_TABLE0_MAIN_LOW)
Look-Up Table 1 Main Lower (LUT_TABLE1_MAIN_LOW)
Look-Up Table 2 Main Lower (LUT_TABLE2_MAIN_LOW)
Look-Up Table 3 Main Lower (LUT_TABLE3_MAIN_LOW)
Look-Up Table 4 Main Lower (LUT_TABLE4_MAIN_LOW)
Look-Up Table 0 Alternate Upper (LUT_TABLE0_ALT_UP)
Look-Up Table 1 Alternate Upper (LUT_TABLE0_ALT_UP)
Look-Up Table 2 Alternate Upper (LUT_TABLE0_ALT_UP)
Look-Up Table 3 Alternate Upper (LUT_TABLE0_ALT_UP)
Look-Up Table 4 Alternate Upper (LUT_TABLE0_ALT_UP)
Look-Up Table 0 Alternate Lower (LUT_TABLE0_ALT_LOW)
Look-Up Table 1 Alternate Lower (LUT_TABLE0_ALT_LOW)
Look-Up Table 2 Alternate Lower (LUT_TABLE0_ALT_LOW)
Look-Up Table 3 Alternate Lower (LUT_TABLE0_ALT_LOW)
Look-Up Table 4 Alternate Lower (LUT_TABLE0_ALT_LOW)
Performance Monitor Configuration Register
(PERF_MONITOR_CONFIG)
Event Time Counter (EVENT_TIME_COUNTER) Register
Event Time Preset (EVENT_TIME_PRESET) Register
Performance Monitor 1 Address Low
(PERF_MNTR1_ADDR_LOW) Register
Performance Monitor 2 Address Low
(PERF_MNTR2_ADDR_LOW) Register
Performance Monitor 1 Address High
(PERF_MNTR1_ADDR_HI) Register
Performance Monitor 2 Address High
(PERF_MNTR2_ADDR_HI) Register
Performance Monitor 1 Read Counter
(PERF_MNTR1_READ_CNTR)
Performance Monitor 2 Read Counter
(PERF_MNTR2_READ_CNTR)
Performance Monitor 1 Write Counter
(PERF_MNTR1_WRITE_CNTR)
Performance Monitor 2 Write Counter
(PERF_MNTR2_WRITE_CNTR)
Table 12-1. PRIOMAN memory map (continued)
MPC5125 Microcontroller Reference Manual, Rev. 2
Register
Access
Multi-port DRAM Controller Priority Manager
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
R
R
R
2
0x2334_567A
0x2334_567A
0x2334_567A
0x2334_567A
0x2334_567A
Reset Value
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0800_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
3
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Section/Page
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