MPC5125YVN400 Freescale Semiconductor, MPC5125YVN400 Datasheet - Page 692

• Manufacturer Part Number: MPC5125YVN400
• Description: IC MCU 32BIT E300 324TEPBGA
• Manufacturer: Freescale Semiconductor
• Series: MPC51xxr

Specifications of MPC5125YVN400

• Core Processor: e300
• Core Size: 32-Bit
• Speed: 400MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, USB OTG
• Peripherals: DMA, WDT
• Number Of I /o: 64
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.33 V ~ 1.47 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 324-PBGA
• Processor Series: MPC51xx
• Core: e300
• Data Bus Width: 32 bit
• Development Tools By Supplier: TWR-MPC5125-KIT, TWR-SER, TWR-ELEV, TOWER
• Maximum Clock Frequency: 400 MHz
• Operating Supply Voltage: 1.4 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Data Ram Size: 32 KB
• I/o Voltage: 3.3 V
• Interface Type: CAN, I2C
• Minimum Operating Temperature: - 40 C
• Program Memory Size: 32 bit
• Cpu Speed: 400MHz
• Embedded Interface Type: CAN, I2C, SPI, UART, USB
• Digital Ic Case Style: TEPBGA
• No. Of Pins: 324
• Rohs Compliant: Yes
• Cpu Family: MPC5xx
• Device Core Size: 32b
• Frequency (max): 400MHz
• Total Internal Ram Size: 32KB
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 324
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Programmable Serial Controller (PSC)
25.4.1.6
Read access from this read only register reads the data directly from the RX shift register. This access
bypasses the data in the RX FIFO. Use the data register in the RX FIFO to read the RX data.
25-14
Address: Base + 0x14
Reset
Reset
Field
RC
W
W
R
R
16
0
0
0
Receiver command.
00 No action taken. Causes receiver to stay in current mode.
01 Receiver enable. Enables receiver.
10 Receiver disable.
11 Reserved. Do not use.
Note: This field selects a single command.
Rx Buffer Register (RB)
— If receiver is enabled, it remains enabled.
— If receiver is disabled, it remains disabled.
— If PSC module is not in multidrop mode (MR1[PM] ≠ 11), RECEIVER ENABLE command enables
channel's receiver and forces it into a search-for-start-bit state. In multidrop mode the Rx continuously
monitors the received data regardless of whether it is enabled or not.
— If receiver is already enabled, this command has no effect.
Immediately disables receiver. In UART mode any character being received is lost. The command does not
affect receiver status bits or other control registers.
— If the PSC module is programmed for local loop-back or multidrop mode, the receiver operates even though
this command is selected.
— If the receiver is already disabled, the command has no effect.
In codec mode, if the receiver is disabled while a character is being received, reception completes before the
receiver becomes inactive.
17
0
0
1
Figure 25-13. Rx Buffer Register for UARTR/Codec8/16/32 Modes (RB)
18
0
0
2
19
0
0
3
MPC5125 Microcontroller Reference Manual, Rev. 2
Table 25-10. CR field descriptions (continued)
20
4
0
0
21
0
0
5
22
0
0
6
Used by Tx Buffer
Used by Tx Buffer
RB[16:31]
23
RB[0:15]
0
0
7
Description
24
8
0
0
25
9
0
0
10
26
0
0
11
27
0
0
12
28
0
0
Freescale Semiconductor
Access: User read-only
13
29
0
0
14
30
0
0
15
31
0
0