MPC5125YVN400 Freescale Semiconductor, MPC5125YVN400 Datasheet - Page 541

• Manufacturer Part Number: MPC5125YVN400
• Description: IC MCU 32BIT E300 324TEPBGA
• Manufacturer: Freescale Semiconductor
• Series: MPC51xxr

Specifications of MPC5125YVN400

• Core Processor: e300
• Core Size: 32-Bit
• Speed: 400MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, USB OTG
• Peripherals: DMA, WDT
• Number Of I /o: 64
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.33 V ~ 1.47 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 324-PBGA
• Processor Series: MPC51xx
• Core: e300
• Data Bus Width: 32 bit
• Development Tools By Supplier: TWR-MPC5125-KIT, TWR-SER, TWR-ELEV, TOWER
• Maximum Clock Frequency: 400 MHz
• Operating Supply Voltage: 1.4 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Data Ram Size: 32 KB
• I/o Voltage: 3.3 V
• Interface Type: CAN, I2C
• Minimum Operating Temperature: - 40 C
• Program Memory Size: 32 bit
• Cpu Speed: 400MHz
• Embedded Interface Type: CAN, I2C, SPI, UART, USB
• Digital Ic Case Style: TEPBGA
• No. Of Pins: 324
• Rohs Compliant: Yes
• Cpu Family: MPC5xx
• Device Core Size: 32b
• Frequency (max): 400MHz
• Total Internal Ram Size: 32KB
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 324
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Chapter 21
LocalPlus Bus Controller (LPC)
21.1
The LocalPlus Bus (LPC) is the external bus interface of the MPC5125. This multi-function bus system
supports interfacing to external boot ROM or flash memories, external SRAM memories, or other memory
mapped devices. See
21.1.1
The LPC includes:
Freescale Semiconductor
Introduction
EMB Arbiter
XLBMEN
Features
Clock
AD is the shared address/data bus. AX is the address extension bus.
Figure 21-1
IP Bus Data
DMA Request
START_ADDRESS
STOP_ADDRESS
AD Bus Request
AD Bus Grant
IPG_CLK
IPS_CLK
MPC5125 Microcontroller Reference Manual, Rev. 2
for a block diagram of the LPC.
Figure 21-1. LPC Block Diagram
SCLPC (FIFO)
Registers
NOTE
LPC
2
8
Variable Width
Variable Width
R/W
ACK
TS
OE
TSIZ[1:0]
CS[7:0]
LPC_CLK
R/W Data
Address
AD[31:0]
AX[9:0]
21-1