MPC5125YVN400 Freescale Semiconductor, MPC5125YVN400 Datasheet - Page 807

• Manufacturer Part Number: MPC5125YVN400
• Description: IC MCU 32BIT E300 324TEPBGA
• Manufacturer: Freescale Semiconductor
• Series: MPC51xxr

Specifications of MPC5125YVN400

• Core Processor: e300
• Core Size: 32-Bit
• Speed: 400MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, USB OTG
• Peripherals: DMA, WDT
• Number Of I /o: 64
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.33 V ~ 1.47 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 324-PBGA
• Processor Series: MPC51xx
• Core: e300
• Data Bus Width: 32 bit
• Development Tools By Supplier: TWR-MPC5125-KIT, TWR-SER, TWR-ELEV, TOWER
• Maximum Clock Frequency: 400 MHz
• Operating Supply Voltage: 1.4 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Data Ram Size: 32 KB
• I/o Voltage: 3.3 V
• Interface Type: CAN, I2C
• Minimum Operating Temperature: - 40 C
• Program Memory Size: 32 bit
• Cpu Speed: 400MHz
• Embedded Interface Type: CAN, I2C, SPI, UART, USB
• Digital Ic Case Style: TEPBGA
• No. Of Pins: 324
• Rohs Compliant: Yes
• Cpu Family: MPC5xx
• Device Core Size: 32b
• Frequency (max): 400MHz
• Total Internal Ram Size: 32KB
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 324
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

28.5.3
When a card is inserted to the socket or the card was reset by the host, the host needs to validate the
operation voltage range, identify the cards, and request the cards to publish the relative card address (RCA)
or to set the RCA for the MMC cards. All data communication in the card identification mode uses the
command line (CMD) only.
28.5.3.1
See
28.5.3.2
There are three types of reset:
Freescale Semiconductor
•
•
•
Figure 28-23
write_reg(SDHC_CMD_DAT_CONT, <cmd_dat_cont>); // 3. configure the command data
control register, writing to this register triggers SDHC send command to the
card.
while(irq_status); // 4. Wait interrupt (End Command Response)
Write_reg(SDHC_INT_CNTR, <int_cntr_value>); // 5.
read_reg(STATUS); // 6. Check whether the interrupt is an End_CMD_RES or a
response time out or a CRC error.
read_reg(SDHC_RES_FIFO); // 7. read the response FIFO to determine if the command
has a response
}
Write 1 to SDHC_INT_CNTR[CARD_INSERTION_EN] to enable card detection interrupt
Write 0 to SDHC_INT_CNTR[CARD_REMOVAL_EN] to disable card detection interrupt
Hardware reset (Card and Host) driven by POR (power on reset).
Card Identification Mode
Card Detect
Reset
for a flow diagram showing the card detection using the host controller.
Figure 28-23. Flow Diagram for Card Detection
Enable Card Detection IRQ
Write INT_Mask to Disable
MPC5125 Microcontroller Reference Manual, Rev. 2
Wait SDHC Interrupt
Card Detection IRQ
Voltage Validation
Check Status[15]
Yes, Card Present
(1)
(2)
No card present
irq request from SDHC
Secure Digital Host Controller (SDHC)
28-35