MPC5125YVN400 Freescale Semiconductor, MPC5125YVN400 Datasheet - Page 838

IC MCU 32BIT E300 324TEPBGA

MPC5125YVN400

Manufacturer Part Number
MPC5125YVN400
Description
IC MCU 32BIT E300 324TEPBGA
Manufacturer
Freescale Semiconductor
Series
MPC51xxr

Specifications of MPC5125YVN400

Core Processor
e300
Core Size
32-Bit
Speed
400MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, USB OTG
Peripherals
DMA, WDT
Number Of I /o
64
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.33 V ~ 1.47 V
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
324-PBGA
Processor Series
MPC51xx
Core
e300
Data Bus Width
32 bit
Development Tools By Supplier
TWR-MPC5125-KIT, TWR-SER, TWR-ELEV, TOWER
Maximum Clock Frequency
400 MHz
Operating Supply Voltage
1.4 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Data Ram Size
32 KB
I/o Voltage
3.3 V
Interface Type
CAN, I2C
Minimum Operating Temperature
- 40 C
Program Memory Size
32 bit
Cpu Speed
400MHz
Embedded Interface Type
CAN, I2C, SPI, UART, USB
Digital Ic Case Style
TEPBGA
No. Of Pins
324
Rohs Compliant
Yes
Cpu Family
MPC5xx
Device Core Size
32b
Frequency (max)
400MHz
Total Internal Ram Size
32KB
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
324
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Part Number
Manufacturer
Quantity
Price
Part Number:
MPC5125YVN400
Manufacturer:
Freescale Semiconductor
Quantity:
135
Part Number:
MPC5125YVN400
Manufacturer:
LTC
Quantity:
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Part Number:
MPC5125YVN400
Manufacturer:
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10 000
Universal Serial Bus Interface with On-The-Go
32.2.1.4.1
The Transmit Buffer Hardware Parameters (USB_HWTXBUF) register provides the transmit buffer
parameters for this implementation of the module.
Table 32-6
32.2.1.5
The Receive Buffer Hardware Parameters (USB_HWRXBUF) register provides the receive buffer
parameters for this implementation of the module.
Table 32-7
32-10
Address: Base + 0x010
TXCHANADD
TXBURST
Reset
Reset
DEVEP
TXADD
TXLCR
Field
Field
DC
W
W
R TXLCR
R
16
1
0
0
provides bit descriptions for the USB_HWTXBUF register.
provides bit descriptions for the USB_HWRXBUF register.
Receive Buffer Hardware Parameters (USB_HWRXBUF) Register
(Non-EHCI)
Figure 32-6. Transmit Buffer Hardware Parameters (USB_HWTXBUF) Register
Transmit Buffer Hardware Parameters (USB_HWTXBUF) Register (Non-EHCI)
Device endpoints. The number of supported endpoints; always 0x4.
Always 1, indicating the OTG module is device capable.
Reserved. Always 1.
Transmit channel address. The number of address bits required to address one channel’s worth of TX data.
Always 0x7 (7).
Transmit address. The number of address bits for the entire TX buffer. Always 0x9 (9).
Transmit burst. Indicates the number of data beats in a burst for transmit DMA data transfers.
Always 0x8 (8).
17
0
0
0
1
18
0
0
0
2
19
0
0
0
3
TXADD
Table 32-5. USB_HWDEVICE field descriptions
MPC5125 Microcontroller Reference Manual, Rev. 2
Table 32-6. USB_HWTXBUF field descriptions
20
4
0
0
1
21
0
0
0
5
22
0
0
0
6
Figure 32-6
Figure 32-7
23
0
0
1
7
Description
Description
24
8
0
0
shows the USB_HWTXBUF register.
shows the USB_HWRXBUF register.
25
9
0
0
10
26
0
0
TXCHANADD
TXBURST
11
27
0
0
12
28
0
1
Freescale Semiconductor
Access: User read-only
13
29
1
0
14
30
1
0
15
31
1
0

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