MPC5125YVN400 Freescale Semiconductor, MPC5125YVN400 Datasheet - Page 713

• Manufacturer Part Number: MPC5125YVN400
• Description: IC MCU 32BIT E300 324TEPBGA
• Manufacturer: Freescale Semiconductor
• Series: MPC51xxr

Specifications of MPC5125YVN400

• Core Processor: e300
• Core Size: 32-Bit
• Speed: 400MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, USB OTG
• Peripherals: DMA, WDT
• Number Of I /o: 64
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.33 V ~ 1.47 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 324-PBGA
• Processor Series: MPC51xx
• Core: e300
• Data Bus Width: 32 bit
• Development Tools By Supplier: TWR-MPC5125-KIT, TWR-SER, TWR-ELEV, TOWER
• Maximum Clock Frequency: 400 MHz
• Operating Supply Voltage: 1.4 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Data Ram Size: 32 KB
• I/o Voltage: 3.3 V
• Interface Type: CAN, I2C
• Minimum Operating Temperature: - 40 C
• Program Memory Size: 32 bit
• Cpu Speed: 400MHz
• Embedded Interface Type: CAN, I2C, SPI, UART, USB
• Digital Ic Case Style: TEPBGA
• No. Of Pins: 324
• Rohs Compliant: Yes
• Cpu Family: MPC5xx
• Device Core Size: 32b
• Frequency (max): 400MHz
• Total Internal Ram Size: 32KB
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 324
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Figure 25-42
25.5.1.4
After a hardware reset, all PSCs are in UART mode. The receiver is enabled through its CR, as described
in
Freescale Semiconductor
Section 25.4.1.5, “Command Register (CR).” Figure 25-43
•
•
NOTES:
If the transmitter is forced to send a continuous low condition by issuing a send break command,
the transmitter ignores the state of CTS.
If the transmitter is programmed to automatically negate RTS when a message transmission
completes, RTS must be asserted manually before a message is sent. In applications in which the
transmitter is disabled after transmission is complete and RTS is appropriately programmed, RTS
is negated one bit-time after the character in the shift register is completely transmitted. The
transmitter must be manually re-enabled by reasserting RT
Transmit
1. Cn
2. W
3. MR2[TxCTS]
4. MR2[TxRTvS]
Enabled
Internal
Module
TxRDY
Select
CTS3
RTS4
TxD
=
Receiving in UART Mode
shows the transmitter functional timing information.
=
write
transmit characters
Manually Asserted
by Bit-Set Command
C11
=
W2
=
1
1
C11
MPC5125 Microcontroller Reference Manual, Rev. 2
Figure 25-42. Timing Diagram—Transmitter
C2
W
C1 in Transmission
C2
C3
W
Break
Start
W
C3
shows the receiver functional timing.
Break
C4 Stop
W
S
before the next message is sent.
Break
W
Programmable Serial Controller (PSC)
Transmitted
C4
Not
C5
W
Manually
Asserted
C6
W
C6
25-35