MPC5125YVN400 Freescale Semiconductor, MPC5125YVN400 Datasheet - Page 29

• Manufacturer Part Number: MPC5125YVN400
• Description: IC MCU 32BIT E300 324TEPBGA
• Manufacturer: Freescale Semiconductor
• Series: MPC51xxr

Specifications of MPC5125YVN400

• Core Processor: e300
• Core Size: 32-Bit
• Speed: 400MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, USB OTG
• Peripherals: DMA, WDT
• Number Of I /o: 64
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.33 V ~ 1.47 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 324-PBGA
• Processor Series: MPC51xx
• Core: e300
• Data Bus Width: 32 bit
• Development Tools By Supplier: TWR-MPC5125-KIT, TWR-SER, TWR-ELEV, TOWER
• Maximum Clock Frequency: 400 MHz
• Operating Supply Voltage: 1.4 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Data Ram Size: 32 KB
• I/o Voltage: 3.3 V
• Interface Type: CAN, I2C
• Minimum Operating Temperature: - 40 C
• Program Memory Size: 32 bit
• Cpu Speed: 400MHz
• Embedded Interface Type: CAN, I2C, SPI, UART, USB
• Digital Ic Case Style: TEPBGA
• No. Of Pins: 324
• Rohs Compliant: Yes
• Cpu Family: MPC5xx
• Device Core Size: 32b
• Frequency (max): 400MHz
• Total Internal Ram Size: 32KB
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 324
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

1.3
The following provides more details of modules implemented on the device:
1.3.1
1.3.2
1.3.3
1.3.4
Freescale Semiconductor
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MMC/SD/SDIO card host controller (SDHC)
Programmable serial controller (PSC)
Inter-integrated circuit (I
Controller area network (CAN)
J1850 byte data link controller (BDLC) interface
On-chip real-time clock (RTC)
On-chip temperature sensor
IC Identification module (IIM)
Power Architecture instruction set
32 KB instruction cache
32 KB data cache
High-performance, superscalar processor core with a four-stage pipeline
Dual-issue processor with integrated floating-point unit and dual integer units
Dynamic power management
Supports LCD display resolution as high as 1280 × 720
Color depth as high as 24 bits per pixel
Hardware n-plane (n ≥ 3) alpha blending, chroma keying support
32 × 32, 4,096 color hardware cursor
Two on-chip USB controllers with On-The-Go (OTG) host/device capability
Each supports high-speed (480 Mbps), full-speed (12 Mbps), and low-speed (1.5 Mbps)
Both USB controllers can be accessed through the ULPI interface
64-channel on-chip DMA engine with advanced capabilities
Supports channel linking and scatter/gather processing
Module Features
e300 Processor Core
Display Interface Unit (DIU)
USB Controller
Direct Memory Access (DMA) Controller
MPC5125 Microcontroller Reference Manual, Rev. 2
Freescale Confidential Proprietary, NDA Required
2
C) communication interfaces
Overview
1-3