MPC5125YVN400 Freescale Semiconductor, MPC5125YVN400 Datasheet - Page 808

IC MCU 32BIT E300 324TEPBGA

MPC5125YVN400

Manufacturer Part Number
MPC5125YVN400
Description
IC MCU 32BIT E300 324TEPBGA
Manufacturer
Freescale Semiconductor
Series
MPC51xxr

Specifications of MPC5125YVN400

Core Processor
e300
Core Size
32-Bit
Speed
400MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, USB OTG
Peripherals
DMA, WDT
Number Of I /o
64
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.33 V ~ 1.47 V
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
324-PBGA
Processor Series
MPC51xx
Core
e300
Data Bus Width
32 bit
Development Tools By Supplier
TWR-MPC5125-KIT, TWR-SER, TWR-ELEV, TOWER
Maximum Clock Frequency
400 MHz
Operating Supply Voltage
1.4 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Data Ram Size
32 KB
I/o Voltage
3.3 V
Interface Type
CAN, I2C
Minimum Operating Temperature
- 40 C
Program Memory Size
32 bit
Cpu Speed
400MHz
Embedded Interface Type
CAN, I2C, SPI, UART, USB
Digital Ic Case Style
TEPBGA
No. Of Pins
324
Rohs Compliant
Yes
Cpu Family
MPC5xx
Device Core Size
32b
Frequency (max)
400MHz
Total Internal Ram Size
32KB
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
324
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Secure Digital Host Controller (SDHC)
After the card is reset, the host needs to validate the voltage range of the card. See
software flow to reset both SDHC and the card.
software_reset()
{
write_reg(SDHC_STR_STP_CLK, 0x8);
write_reg(SDHC_STR_STP_CLK, 0x9);// 1. reset the SDHC host;
write_reg(SDHC_STR_STP_CLK, 0x1);
write_reg(SDHC_STR_STP_CLK, 0x1);
write_reg(SDHC_STR_STP_CLK, 0x1);
write_reg(SDHC_STR_STP_CLK, 0x1);
28-36
Software reset (Host Only) proceeds by the write operation on the SDHC_STR_STP_CLK
register. Follow the recommended sequence as specified in
Control (SDHC_STR_STP_CLK) Register.”
not reset the card. The card reset is through CMD0. After you apply software reset to SDHC, it
should also use CMD0 to reset the card in case the card is in an unknown state. Write 0x2 to the
SDHC_STR_STP_CLK register and poll status[8] to wait until the clock is on. It is highly
recommended to start clock here and leave the clock unchanged afterwards.
Card is reset (Card Only). The command, Go_Idle_State, CMD0 is the software reset command for
the MMC and SD memory card. This sets each card into idle state regardless of the current card
state. When used as a SD I/O Card, CMD52 writes IO reset in CCCR. The cards are initialized with
a default relative card address (RCA = 0x0000) and with a default driver stage register setting
(lowest speed, highest driving current capability).
Figure 28-24. Flow Chart for Reset of SDHC and SD I/O Card
MPC5125 Microcontroller Reference Manual, Rev. 2
Send CMD0/CMD52 to Card to Reset Card
Write 0x3F to SDHC_CLK_RATE Register
Write 0x08 to SDHC_STR_STP_CLK
Write 0x1 to STR_STP_CLK 8 Times
Write 0x9 to SDHC_STR_STP_CLK
Set bit 1 of SDHC_STR_STP_CLK
and waitfor clock on
Voltage Validation
The reset can reset all the SDHC registers, but does
Section 28.3.2.1, “SDHC Clock
Figure 28-24
Freescale Semiconductor
for the

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