MPC5125YVN400 Freescale Semiconductor, MPC5125YVN400 Datasheet - Page 683

• Manufacturer Part Number: MPC5125YVN400
• Description: IC MCU 32BIT E300 324TEPBGA
• Manufacturer: Freescale Semiconductor
• Series: MPC51xxr

Specifications of MPC5125YVN400

• Core Processor: e300
• Core Size: 32-Bit
• Speed: 400MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, USB OTG
• Peripherals: DMA, WDT
• Number Of I /o: 64
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.33 V ~ 1.47 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 324-PBGA
• Processor Series: MPC51xx
• Core: e300
• Data Bus Width: 32 bit
• Development Tools By Supplier: TWR-MPC5125-KIT, TWR-SER, TWR-ELEV, TOWER
• Maximum Clock Frequency: 400 MHz
• Operating Supply Voltage: 1.4 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Data Ram Size: 32 KB
• I/o Voltage: 3.3 V
• Interface Type: CAN, I2C
• Minimum Operating Temperature: - 40 C
• Program Memory Size: 32 bit
• Cpu Speed: 400MHz
• Embedded Interface Type: CAN, I2C, SPI, UART, USB
• Digital Ic Case Style: TEPBGA
• No. Of Pins: 324
• Rohs Compliant: Yes
• Cpu Family: MPC5xx
• Device Core Size: 32b
• Frequency (max): 400MHz
• Total Internal Ram Size: 32KB
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 324
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Freescale Semiconductor
PSC0: 0xFF41_1000
PSC1: 0xFF41_1100
PSC2: 0xFF41_1200
PSC3: 0xFF41_1300
PSC4: 0xFF41_1400
PSC5: 0xFF41_1500
PSC6: 0xFF41_1600
PSC7: 0xFF41_1700
PSC8: 0xFF41_1800
PSC9: 0xFF41_1900
PSC_BASE
Offset from
0x0A–0x0B
0x01–0x03
0x05–0x07
0x0C
0x1C
0x2C
0x00
0x04
0x08
0x10
0x14
0x14
0x18
0x20
0x24
0x28
0xFF41_1A00–0xFF41_1EFF Reserved
1
(FIFOC_BASE)
Mode Register 1 (MR1)
Reserved
Mode Register 2 (MR2)
Reserved
Status Register (SR)
Reserved
Clock Select Register (CSR)
Command Register (CR)
Rx Buffer Register (RB)
Tx Buffer Register (TB)
Input Port Change Register (IPCR)
Auxiliary Control Register (ACR)
Interrupt Status Register (ISR)
Interrupt Mask Register (IMR)
Counter Timer Upper Register (CTUR)
Counter Timer Lower Register (CTLR)
(PSC9_BASE)
0xFF41_1900
0xFF41_1F00
Address
Table 25-2. PSC and FICOC Memory Map (continued)
MPC5125 Microcontroller Reference Manual, Rev. 2
Table 25-3. PSC memory map
0x00–0x54: PSC9 registers
0x58–0x7F: Reserved
0x80–0xFF: PSC9 FIFOC registers
FIFOC registers
(see
Register
Chapter 26, “PSC Centralized FIFO Controller
Register area
Access Reset Value
R/W
R/W
R/W
R/W
R/W
R/W
R/W
W
W
R
R
R
R
Programmable Serial Controller (PSC)
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000
0x00
0x00
0x00
0x00
0x00
0x00
0x00
(FIFOC)”)
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