MPC5125YVN400 Freescale Semiconductor, MPC5125YVN400 Datasheet - Page 721

IC MCU 32BIT E300 324TEPBGA

MPC5125YVN400

Manufacturer Part Number
MPC5125YVN400
Description
IC MCU 32BIT E300 324TEPBGA
Manufacturer
Freescale Semiconductor
Series
MPC51xxr

Specifications of MPC5125YVN400

Core Processor
e300
Core Size
32-Bit
Speed
400MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, USB OTG
Peripherals
DMA, WDT
Number Of I /o
64
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.33 V ~ 1.47 V
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
324-PBGA
Processor Series
MPC51xx
Core
e300
Data Bus Width
32 bit
Development Tools By Supplier
TWR-MPC5125-KIT, TWR-SER, TWR-ELEV, TOWER
Maximum Clock Frequency
400 MHz
Operating Supply Voltage
1.4 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Data Ram Size
32 KB
I/o Voltage
3.3 V
Interface Type
CAN, I2C
Minimum Operating Temperature
- 40 C
Program Memory Size
32 bit
Cpu Speed
400MHz
Embedded Interface Type
CAN, I2C, SPI, UART, USB
Digital Ic Case Style
TEPBGA
No. Of Pins
324
Rohs Compliant
Yes
Cpu Family
MPC5xx
Device Core Size
32b
Frequency (max)
400MHz
Total Internal Ram Size
32KB
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
324
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Table 25-32
25.5.2.4
The ESAI transmission is similar to the soft modem mode. Therefore, the configuration as described in
Section 25.5.2.3, “Transmitting and Receiving in Soft Modem Codec Mode.”
ESAI protocol allows to transmit and receive more than one data word per frame. To enable the ESAI
mode, the SICR[ESAI] bit must be set. The PSC calculates how many data words the transmitter sends
and how much data the receiver expects.
Freescale Semiconductor
Register
Register
CTUR
SICR
CCR
SICR
CR
CR
CR
CR
PSC in Master mode
32-bit soft modem mode
Data is sampled on the rising edge of BCLK
FrameSync is low true
LSB first, transfer starts one cycle after the leading edge of FrameSync
Set MCLK frequency to 33 MHz
Set BCLK frequency to 250 kHz
FrameSync every 35 BCLK
Set FrameSync width to 3 BCLK
shows an example of how to configure the PSC2 as:
Transmitting and Receiving in ESAI Mode (Enhanced Serial Audio
Interface)
0x3FA0_0000
0x2283_0000
0x0210_0000
Value
0x0A
0x02
0x05
Value
0x0A
0x05
Table 25-32. 32-Bit “Soft Modem“Master Mode
MPC5125 Microcontroller Reference Manual, Rev. 2
Disable the Tx and Rx part for configuration if the PSC was enabled by the work before.
Select the 32bit Codec mode, LSB first, DTS1 = 1, master mode
select the BCLK and FrameSync frequency
select the FrameSync width
Enable Tx and Rx
Table 25-31. 16-Bit Soft Modem Slave Mode
Disable the Tx and Rx part for configuration if the PSC was enabled by the work before.
Select the 16 bit Codec mode, MSB first, DTS1 = 0, slave mode
Enable Tx and Rx
Figure 25-48
shows the ESAI transmission diagram.
Setting
Setting
Programmable Serial Controller (PSC)
The difference is that the
25-43

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