MPC5125YVN400 Freescale Semiconductor, MPC5125YVN400 Datasheet - Page 670

• Manufacturer Part Number: MPC5125YVN400
• Description: IC MCU 32BIT E300 324TEPBGA
• Manufacturer: Freescale Semiconductor
• Series: MPC51xxr

Specifications of MPC5125YVN400

• Core Processor: e300
• Core Size: 32-Bit
• Speed: 400MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, USB OTG
• Peripherals: DMA, WDT
• Number Of I /o: 64
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.33 V ~ 1.47 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 324-PBGA
• Processor Series: MPC51xx
• Core: e300
• Data Bus Width: 32 bit
• Development Tools By Supplier: TWR-MPC5125-KIT, TWR-SER, TWR-ELEV, TOWER
• Maximum Clock Frequency: 400 MHz
• Operating Supply Voltage: 1.4 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Data Ram Size: 32 KB
• I/o Voltage: 3.3 V
• Interface Type: CAN, I2C
• Minimum Operating Temperature: - 40 C
• Program Memory Size: 32 bit
• Cpu Speed: 400MHz
• Embedded Interface Type: CAN, I2C, SPI, UART, USB
• Digital Ic Case Style: TEPBGA
• No. Of Pins: 324
• Rohs Compliant: Yes
• Cpu Family: MPC5xx
• Device Core Size: 32b
• Frequency (max): 400MHz
• Total Internal Ram Size: 32KB
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 324
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Power Management Control Module (PMC)
24.2.2.6
The PMC Wakeup Source Polarity (PMC_PMCWSP) register can be used to select polarity of the external
deep sleep mode wakeup signals.
24-6
Address: Base + 0x14
Reset
Reset
WSE5
WSE4
WSE3
WSE2
WSE1
WSE0
WSP7
Field
Field
W
W
R
R
16
0
0
0
0
0
PMC Wakeup Source Polarity (PMC_PMCWSP) Register
Deep sleep mode wake up signal enable 5. MSCAN1_RX.
0 Wake up source is disabled.
1 Wake up source is enabled.
Deep sleep mode wake up signal enable 4. MSCAN2_RX.
0 Wake up source is disabled.
1 Wake up source is enabled.
Deep sleep mode wake up signal enable 3. GPIO03.
0 Wake up source is disabled.
1 Wake up source is enabled.
Deep sleep mode wake up signal enable 2. GPIO02.
0 Wake up source is disabled.
1 Wake up source is enabled.
Deep sleep mode wake up signal enable 1. GPIO01
0 Wake up source is disabled.
1 Wake up source is enabled.
Deep sleep mode wake up signal enable 0. GPIO00.
0 Wake up source is disabled.
1 Wake up source is enabled.
Deep sleep wake up signal polarity select 7. Reserved.
0 Active low.
1 Active high (default).
17
0
0
0
0
1
Figure 24-6. PMC Wakeup Source Polarity (PMC_PMCWSP) Register
18
0
0
0
0
2
Table 24-6. PMC_PMCWSE field descriptions (continued)
19
0
0
0
0
3
MPC5125 Microcontroller Reference Manual, Rev. 2
Table 24-7. PMC_PMCWSP field descriptions
20
4
0
0
0
0
21
0
0
0
0
5
22
0
0
0
0
6
23
0
0
0
0
7
Description
Description
WSP
24
8
0
0
7
1
WSP
25
9
0
0
6
1
WSP
10
26
0
0
5
1
WSP
11
27
0
0
4
1
WSP
12
28
0
0
3
1
Freescale Semiconductor
Access: User read/write
WSP
13
29
0
0
2
1
WSP
14
30
0
0
1
1
WSP
15
31
0
0
0
1