MPC5125YVN400 Freescale Semiconductor, MPC5125YVN400 Datasheet - Page 225

• Manufacturer Part Number: MPC5125YVN400
• Description: IC MCU 32BIT E300 324TEPBGA
• Manufacturer: Freescale Semiconductor
• Series: MPC51xxr

Specifications of MPC5125YVN400

• Core Processor: e300
• Core Size: 32-Bit
• Speed: 400MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, USB OTG
• Peripherals: DMA, WDT
• Number Of I /o: 64
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.33 V ~ 1.47 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 324-PBGA
• Processor Series: MPC51xx
• Core: e300
• Data Bus Width: 32 bit
• Development Tools By Supplier: TWR-MPC5125-KIT, TWR-SER, TWR-ELEV, TOWER
• Maximum Clock Frequency: 400 MHz
• Operating Supply Voltage: 1.4 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Data Ram Size: 32 KB
• I/o Voltage: 3.3 V
• Interface Type: CAN, I2C
• Minimum Operating Temperature: - 40 C
• Program Memory Size: 32 bit
• Cpu Speed: 400MHz
• Embedded Interface Type: CAN, I2C, SPI, UART, USB
• Digital Ic Case Style: TEPBGA
• No. Of Pins: 324
• Rohs Compliant: Yes
• Cpu Family: MPC5xx
• Device Core Size: 32b
• Frequency (max): 400MHz
• Total Internal Ram Size: 32KB
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 324
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Freescale Semiconductor
0x1100–0x113C TCD08—Transfer Control Descriptors Channel 08
0x1120–0x113C TCD09—Transfer Control Descriptors Channel 09
0x1140–0x115C TCD10—Transfer Control Descriptors Channel 10
0x1160–0x117C TCD11—Transfer Control Descriptors Channel 11
0x1180–0x119C TCD12—Transfer Control Descriptors Channel 12
0x1200–0x121C TCD16—Transfer Control Descriptors Channel 16
0x1220–0x123C TCD17—Transfer Control Descriptors Channel 17
0x1240–0x125C TCD18—Transfer Control Descriptors Channel 18
0x1260–0x127C TCD19—Transfer Control Descriptors Channel 19
0x1280–0x129C TCD20—Transfer Control Descriptors Channel 20
0x1300–0x133C TCD24—Transfer Control Descriptors Channel 24
0x1320–0x133C TCD25—Transfer Control Descriptors Channel 25
0x1340–0x135C TCD26—Transfer Control Descriptors Channel 26
0x1360–0x137C TCD27—Transfer Control Descriptors Channel 27
0x1380–0x139C TCD28—Transfer Control Descriptors Channel 28
0x1400–0x141C TCD32—Transfer Control Descriptors Channel 32
0x1420–0x143C TCD33—Transfer Control Descriptors Channel 33
0x1440–0x145C TCD34—Transfer Control Descriptors Channel 34
0x1460–0x147C TCD35—Transfer Control Descriptors Channel 35
0x10A0–0x10BC TCD05—Transfer Control Descriptors Channel 05
0x10C0–0x10DC TCD06—Transfer Control Descriptors Channel 06
0x11A0–0x11BC TCD13—Transfer Control Descriptors Channel 13
0x11C0–0x11DC TCD14—Transfer Control Descriptors Channel 14
0x12A0–0x12BC TCD21—Transfer Control Descriptors Channel 21
0x12C0–0x12DC TCD22—Transfer Control Descriptors Channel 22
0x13A0–0x13BC TCD29—Transfer Control Descriptors Channel 29
0x13C0–0x13DC TCD30—Transfer Control Descriptors Channel 30
(0xFF41_4000)
0x10E0–0x10FC TCD07—Transfer Control Descriptors Channel 07
0x11E0–0x11FC TCD15—Transfer Control Descriptors Channel 15
0x12E0–0x12FC TCD23—Transfer Control Descriptors Channel 23
0x13E0–0x13FC TCD31—Transfer Control Descriptors Channel 31
DMA_BASE
Offset from
1
MPC5125 Microcontroller Reference Manual, Rev. 2
Table 9-1. DMA memory map (continued)
Register
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
2
Reset Value
Direct Memory Access (DMA)
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
3
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