MPC5125YVN400 Freescale Semiconductor, MPC5125YVN400 Datasheet - Page 703

• Manufacturer Part Number: MPC5125YVN400
• Description: IC MCU 32BIT E300 324TEPBGA
• Manufacturer: Freescale Semiconductor
• Series: MPC51xxr

Specifications of MPC5125YVN400

• Core Processor: e300
• Core Size: 32-Bit
• Speed: 400MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, USB OTG
• Peripherals: DMA, WDT
• Number Of I /o: 64
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.33 V ~ 1.47 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 324-PBGA
• Processor Series: MPC51xx
• Core: e300
• Data Bus Width: 32 bit
• Development Tools By Supplier: TWR-MPC5125-KIT, TWR-SER, TWR-ELEV, TOWER
• Maximum Clock Frequency: 400 MHz
• Operating Supply Voltage: 1.4 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Data Ram Size: 32 KB
• I/o Voltage: 3.3 V
• Interface Type: CAN, I2C
• Minimum Operating Temperature: - 40 C
• Program Memory Size: 32 bit
• Cpu Speed: 400MHz
• Embedded Interface Type: CAN, I2C, SPI, UART, USB
• Digital Ic Case Style: TEPBGA
• No. Of Pins: 324
• Rohs Compliant: Yes
• Cpu Family: MPC5xx
• Device Core Size: 32b
• Frequency (max): 400MHz
• Total Internal Ram Size: 32KB
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 324
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

25.4.1.15 AC97 Slots Register (AC97Slots)
This register defines which slots are expected in a receive AC97 frame and which slots are sent in a AC97
TX frame. If the received frame does not match the expected slots, the SR[UNEXP_RX_SLOTS] bit is
set. This register has an effect only if the AC97 mode is selected in the SICR register and if the EnAC97
bit is set to 1.
25.4.1.16 AC97 Command Register (AC97CMD)
This register contains the AC97 address for transmit slot1 and the AC97 command data for transmit slot 2.
A write access to any byte of this register sets the SR[CMD_SEND] bit to one. The AC97 transmitter
generates a frame with valid slot1 and slot2 and pastes the values of this register to the next transmitted
slot1 and slot2. If the data was sent, the SR[CMD_SEND] bit is cleared by the transmitter.
Freescale Semiconductor
Address: Base + 0x34
Reset
Reset
RX_Slots
TX_Slots
Field
W
W
R
R
16
0
0
0
0
0
AC97 Mode. Expected Transmit Slots
The bits in this register specify which data slots [3:12] are sent in an AC97 TX frame. Each bit represents one
data slot. The AC97 transmitter uses this information to generate the slot0 and reads out the according
number of data words from the TXFIFO. If the TXFIFO is empty, an empty AC97 frame is sent until new data
is available.
Other Modes. Reserved.
AC97 Mode. Expected Receive Slots
The bits in this register specifies which data slots [3:12] in the receive AC97 frame must contain valid data.
The AC97 codec selects the valid data slots by setting the according data valid bit in slot0[12:3]. Each bit
represents one data slot. If the received valid slots do not match the expected slots, the unexpected slot
received state occurs. See register SR. The received data is written to the RXFIFO only if the received slots
matched the expected slots.
Other Modes. Reserved.
17
0
0
0
0
1
18
0
0
0
0
2
19
0
0
0
0
3
Figure 25-30. AC97 Slots Register (AC97Slots)
MPC5125 Microcontroller Reference Manual, Rev. 2
Table 25-20. AC97Slots field descriptions
20
4
0
0
0
0
21
0
0
0
0
5
22
0
0
6
23
0
0
7
Description
24
8
0
0
25
9
0
0
RX_SLOTS[3:12]
TX_SLOTS[3:12]
10
26
0
0
Programmable Serial Controller (PSC)
11
27
0
0
12
28
0
0
Access: User read/write
13
29
0
0
14
30
0
0
25-25
15
31
0
0