MPC5125YVN400 Freescale Semiconductor, MPC5125YVN400 Datasheet - Page 345

• Manufacturer Part Number: MPC5125YVN400
• Description: IC MCU 32BIT E300 324TEPBGA
• Manufacturer: Freescale Semiconductor
• Series: MPC51xxr

Specifications of MPC5125YVN400

• Core Processor: e300
• Core Size: 32-Bit
• Speed: 400MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, USB OTG
• Peripherals: DMA, WDT
• Number Of I /o: 64
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.33 V ~ 1.47 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 324-PBGA
• Processor Series: MPC51xx
• Core: e300
• Data Bus Width: 32 bit
• Development Tools By Supplier: TWR-MPC5125-KIT, TWR-SER, TWR-ELEV, TOWER
• Maximum Clock Frequency: 400 MHz
• Operating Supply Voltage: 1.4 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Data Ram Size: 32 KB
• I/o Voltage: 3.3 V
• Interface Type: CAN, I2C
• Minimum Operating Temperature: - 40 C
• Program Memory Size: 32 bit
• Cpu Speed: 400MHz
• Embedded Interface Type: CAN, I2C, SPI, UART, USB
• Digital Ic Case Style: TEPBGA
• No. Of Pins: 324
• Rohs Compliant: Yes
• Cpu Family: MPC5xx
• Device Core Size: 32b
• Frequency (max): 400MHz
• Total Internal Ram Size: 32KB
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 324
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

1
2
12.3.2.9
The Event Time Counter (EVENT_TIME_COUNTER) register contains the 24-bit
EVENT_TIME_COUNTER bitfield. The counter decrements to 0. The interrupt and the DMA request are
made pending when it reachers 0. On reaching 0, the counter reloads from the event count preset register
if the EVENTCOUNTFREERUN bit is set in the PERMON_CONFIG register (see
“Performance Monitor Configuration (PERF_MONITOR_CONFIG)
On reaching 0, all performance monitor count registers are loaded in the performance monitor buffer
registers, and cleared.
Freescale Semiconductor
COUNTER[23:0]
EVENT_TIME_
Address: Base + 0x00E0
This bit should be set as long as the DMA channel is not configured to manage the request. After configuring the DMA, clear
the bit, and data starts to be transferred on every time tick.
Congested flag is explained in
Reset
Reset
Field
W
W
R
R
16
0
0
0
0
Event Time Counter (EVENT_TIME_COUNTER) Register
Current count in the register.
17
0
0
0
1
Figure 12-10. Event Time Counter (EVENT_TIME_COUNTER) Register
18
0
0
0
2
Table 12-10. EVENT_TIME_COUNTER field descriptions
Section 12.4.3, “Congestion Detector.”
19
0
0
0
3
MPC5125 Microcontroller Reference Manual, Rev. 2
20
4
0
0
0
21
0
0
0
5
EVENT_TIME_COUNTER[23:0]
22
0
0
0
6
23
0
0
0
7
Description
24
8
0
0
25
9
0
0
EVENT_TIME_COUNTER[23:0]
Register).
Multi-port DRAM Controller Priority Manager
10
26
0
0
11
27
0
0
12
28
0
0
Section 12.3.2.8,
Access: User read/write
13
29
0
0
14
30
0
0
12-13
15
31
0
0