MPC5125YVN400 Freescale Semiconductor, MPC5125YVN400 Datasheet - Page 272

• Manufacturer Part Number: MPC5125YVN400
• Description: IC MCU 32BIT E300 324TEPBGA
• Manufacturer: Freescale Semiconductor
• Series: MPC51xxr

Specifications of MPC5125YVN400

• Core Processor: e300
• Core Size: 32-Bit
• Speed: 400MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, USB OTG
• Peripherals: DMA, WDT
• Number Of I /o: 64
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.33 V ~ 1.47 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 324-PBGA
• Processor Series: MPC51xx
• Core: e300
• Data Bus Width: 32 bit
• Development Tools By Supplier: TWR-MPC5125-KIT, TWR-SER, TWR-ELEV, TOWER
• Maximum Clock Frequency: 400 MHz
• Operating Supply Voltage: 1.4 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Data Ram Size: 32 KB
• I/o Voltage: 3.3 V
• Interface Type: CAN, I2C
• Minimum Operating Temperature: - 40 C
• Program Memory Size: 32 bit
• Cpu Speed: 400MHz
• Embedded Interface Type: CAN, I2C, SPI, UART, USB
• Digital Ic Case Style: TEPBGA
• No. Of Pins: 324
• Rohs Compliant: Yes
• Cpu Family: MPC5xx
• Device Core Size: 32b
• Frequency (max): 400MHz
• Total Internal Ram Size: 32KB
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 324
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Display Interface Unit (DIU)
10.3.3.5
The Palette Table Pointer Register (PALETTE) sets the base address to the Palette table in memory.
Writing to this register causes the DIU to load the new Palette table from there. This address must be 64-bit
boundary aligned (set the lowest 3 bits to 0). A 32-byte boundary aligned address is more efficient.
10-10
Address: Base + 0x0C
Address: Base + 0x10
Reset
Reset
Reset
Reset
PALETTE
GAMMA
Field
Field
W
W
W
W
R
R
R
R
16
16
0
0
0
0
0
0
Palette Table Pointer Register (PALETTE)
Base address to the GAMMA table in memory.
Base address to the PALETTE table in memory.
17
17
0
0
0
0
1
1
18
18
0
0
0
0
2
2
Figure 10-5. Palette Table Pointer Register (PALETTE)
19
19
0
0
0
0
3
3
MPC5125 Microcontroller Reference Manual, Rev. 2
Table 10-8. PALETTE field descriptions
Table 10-7. GAMMA field descriptions
20
20
4
0
0
4
0
0
Figure 10-4. GAMMA Register
21
21
0
0
0
0
5
5
22
22
0
0
0
0
6
6
PALETTE
PALETTE
23
23
0
0
0
0
7
GAMMA
GAMMA
7
Description
Description
24
24
8
0
0
8
0
0
25
25
9
0
0
9
0
0
10
26
10
26
0
0
0
0
11
27
11
27
0
0
0
0
12
28
12
28
0
0
0
0
Freescale Semiconductor
Access: User read/write
Access: User read/write
13
29
13
29
0
0
0
0
14
30
14
30
0
0
0
0
15
31
15
31
0
0
0
0