MPC5125YVN400 Freescale Semiconductor, MPC5125YVN400 Datasheet - Page 611

• Manufacturer Part Number: MPC5125YVN400
• Description: IC MCU 32BIT E300 324TEPBGA
• Manufacturer: Freescale Semiconductor
• Series: MPC51xxr

Specifications of MPC5125YVN400

• Core Processor: e300
• Core Size: 32-Bit
• Speed: 400MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, USB OTG
• Peripherals: DMA, WDT
• Number Of I /o: 64
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.33 V ~ 1.47 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 324-PBGA
• Processor Series: MPC51xx
• Core: e300
• Data Bus Width: 32 bit
• Development Tools By Supplier: TWR-MPC5125-KIT, TWR-SER, TWR-ELEV, TOWER
• Maximum Clock Frequency: 400 MHz
• Operating Supply Voltage: 1.4 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Data Ram Size: 32 KB
• I/o Voltage: 3.3 V
• Interface Type: CAN, I2C
• Minimum Operating Temperature: - 40 C
• Program Memory Size: 32 bit
• Cpu Speed: 400MHz
• Embedded Interface Type: CAN, I2C, SPI, UART, USB
• Digital Ic Case Style: TEPBGA
• No. Of Pins: 324
• Rohs Compliant: Yes
• Cpu Family: MPC5xx
• Device Core Size: 32b
• Frequency (max): 400MHz
• Total Internal Ram Size: 32KB
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 324
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

In cases of more than one buffer having the same lowest priority, the message buffer with the lower index
number wins.
Read: Anytime when TXEx flag is set (see
(CANTFLG)”) and the corresponding transmit buffer is selected in CANTBSEL (see
“MSCAN Transmitter Buffer Selection
Write: Anytime when TXEx flag is set (see
(CANTFLG)”) and the corresponding transmit buffer is selected in CANTBSEL (see
“MSCAN Transmitter Buffer Selection
22.3.3.5
If the TIME bit is enabled, the MSCAN writes a special time stamp to the respective registers in the active
transmit or receive buffer as soon as a message has been acknowledged on the CAN bus (see
Section 22.3.2.1, “MSCAN Control 0 Register
point for the recessive bit of the ACK delimiter in the CAN frame. In case of a transmission, the Power
Architecture can only read the time stamp after the respective transmit buffer has been flagged empty.
The timer value, which is used for stamping, is taken from a free running internal CAN bit clock. A timer
overrun is not indicated by the MSCAN. The timer is reset (all bits set to 0) during initialization mode. The
Power Architecture can only read the time stamp registers.
1
Freescale Semiconductor
Reset value is indeterminate.
Address: Base + 0x59 (RX)
Address: Base + 0x5C (RX)
Address: Base + 0x5D (RX)
Reset
Reset
Reset
W
W
W
R
R
R
1
1
Base + 0x79 (TX)
Base + 0x7C (TX)
Base + 0x7D (TX)
TSR15
PRIO7
Time Stamp Register (TSRH–TSRL)
TSR7
—
—
0
0
0
0
TSR14
PRIO6
Figure 22-31. Time Stamp Register—High Byte (TSRH)
TSR6
Figure 22-32. Time Stamp Register— Low Byte (TSRL)
Figure 22-30. Transmit Buffer Priority Register (TBPR)
—
—
1
0
1
1
MPC5125 Microcontroller Reference Manual, Rev. 2
TSR13
PRIO5
TSR5
—
—
0
2
2
2
(CANTBSEL)”).
(CANTBSEL)”).
Section 22.3.2.7, “MSCAN Transmitter Flag Register
Section 22.3.2.7, “MSCAN Transmitter Flag Register
(CANCTL0)”). The time stamp is written on the bit sample
TSR12
PRIO4
TSR4
—
—
0
3
3
3
TSR11
PRIO3
TSR3
—
—
0
4
4
4
TSR10
PRIO2
TSR2
—
—
0
5
5
5
PRIO1
Access: User read/write
TSR9
TSR1
Access: User read-only
Access: User read-only
Section 22.3.2.11,
Section 22.3.2.11,
—
—
0
6
6
6
PRIO0
TSR8
TSR0
—
—
0
7
7
7
MSCAN
22-33