MPC5125YVN400 Freescale Semiconductor, MPC5125YVN400 Datasheet - Page 324

IC MCU 32BIT E300 324TEPBGA

MPC5125YVN400

Manufacturer Part Number
MPC5125YVN400
Description
IC MCU 32BIT E300 324TEPBGA
Manufacturer
Freescale Semiconductor
Series
MPC51xxr

Specifications of MPC5125YVN400

Core Processor
e300
Core Size
32-Bit
Speed
400MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, USB OTG
Peripherals
DMA, WDT
Number Of I /o
64
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.33 V ~ 1.47 V
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
324-PBGA
Processor Series
MPC51xx
Core
e300
Data Bus Width
32 bit
Development Tools By Supplier
TWR-MPC5125-KIT, TWR-SER, TWR-ELEV, TOWER
Maximum Clock Frequency
400 MHz
Operating Supply Voltage
1.4 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Data Ram Size
32 KB
I/o Voltage
3.3 V
Interface Type
CAN, I2C
Minimum Operating Temperature
- 40 C
Program Memory Size
32 bit
Cpu Speed
400MHz
Embedded Interface Type
CAN, I2C, SPI, UART, USB
Digital Ic Case Style
TEPBGA
No. Of Pins
324
Rohs Compliant
Yes
Cpu Family
MPC5xx
Device Core Size
32b
Frequency (max)
400MHz
Total Internal Ram Size
32KB
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
324
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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DRAM Controller
1
The COMPACT_COMMAND register’s main purpose is to be written during enter/exit of self-refresh (the
auto-sequencer). This is described in the following section.
The compact command register allows three types of actions to be executed:
11-16
COMPACT_COMMAND[15:14]
DRAM_COMPACT_
COMMAND[15:0]
CKE is turned off the clock cycle when sending the requested command to the DRAM.
Field
Write DRAM attributes and wait. Wait is executed after updating the DRAM attributes. It is
possible to update the CKE bit, the self-refresh enable, the CLK configuration (on/off), and the
CMD mode setting.
If, during the time the wait is executed, another command is written to the Compact Command
register, this write is delayed until the wait is over.
During this time, the peripheral bus and all buses connected to it block and are not able to process
any other read or write.
00
01
1x
The compact command register gives the option to sent commands to the DRAM using 16-bit writes. See
Table
Table 11-11. DDR_COMPACT_COMMAND field descriptions
11-12.
Table 11-12. DDR_COMPACT_COMMAND register options
Write DRAM attributes and wait (wait time = wait time till next command) Wait is executed
after writing attributes.
Or
DRAM command
DRAM set mode registers
• CKE = COMPACT_COMMAND[13]
• Self Ref En = COMPACT_COMMAND[12]
• CLK ON = COMPACT_COMMAND[11]
• CMD MODE = COMPACT_COMMAND[10]
• If (COMPACT_COMMAND[7] == 1’b1)
• Wait time = (COMPACT_COMMAND[6:0] × 512) dram clock periods
• Wait time = (COMPACT_COMMAND[6:0] × 32) dram clock periods
• DRAM_CS = COMPACT_COMMAND[12]
• DRAM_RAS = COMPACT_COMMAND[11]
• DRAM_CAS = COMPACT_COMMAND[10]
• DRAM_WEB = COMPACT_COMMAND[9]
• DRAM_BA[2:0] = COMPACT_COMMAND[8:6]
• DRAM_ADDRESS[10] = COMPACT_COMMAND[5]
• if(COMPACT_COMMAND[4] == 1’b1) turn off CKE DRAM attribute bit
• DRAM_CS = 0
• DRAM_RAS = 0
• DRAM_CAS = 0
• DRAM_WEB = 0
• DRAM_ADDRESS[13] = 0
• DRAM_BA[2] = 0
• DRAM_ADDRESS[12:0] = COMPACT_COMMAND[12:0]
• DRAM_ADDRESS[14:13] = COMPACT_COMMAND[14:13]
MPC5125 Microcontroller Reference Manual, Rev. 2
Description
Description
Freescale Semiconductor
1

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