MPC5125YVN400 Freescale Semiconductor, MPC5125YVN400 Datasheet - Page 37

• Manufacturer Part Number: MPC5125YVN400
• Description: IC MCU 32BIT E300 324TEPBGA
• Manufacturer: Freescale Semiconductor
• Series: MPC51xxr

Specifications of MPC5125YVN400

• Core Processor: e300
• Core Size: 32-Bit
• Speed: 400MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, USB OTG
• Peripherals: DMA, WDT
• Number Of I /o: 64
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.33 V ~ 1.47 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 324-PBGA
• Processor Series: MPC51xx
• Core: e300
• Data Bus Width: 32 bit
• Development Tools By Supplier: TWR-MPC5125-KIT, TWR-SER, TWR-ELEV, TOWER
• Maximum Clock Frequency: 400 MHz
• Operating Supply Voltage: 1.4 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Data Ram Size: 32 KB
• I/o Voltage: 3.3 V
• Interface Type: CAN, I2C
• Minimum Operating Temperature: - 40 C
• Program Memory Size: 32 bit
• Cpu Speed: 400MHz
• Embedded Interface Type: CAN, I2C, SPI, UART, USB
• Digital Ic Case Style: TEPBGA
• No. Of Pins: 324
• Rohs Compliant: Yes
• Cpu Family: MPC5xx
• Device Core Size: 32b
• Frequency (max): 400MHz
• Total Internal Ram Size: 32KB
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 324
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

always comes out of reset with a default base address value of 0xFF40_0000. The value of IMMRBAR
can be modified by writing to this register. For more information, see
Map Registers Base Address Register (IMMRBAR).”
2.2.4
As demonstrated in the address map overview in
Example,”
interface. This allows the internal interconnections of the MPC5125 to route a transaction from its source
to the proper target. No address translation is performed. The base address defines the high order address
bits that give the location of the window in the local address space. The window attributes enable the
window and define its size, while the window number specifies the target interface.
With the exception of configuration space (mapped by IMMRBAR), all addresses used by the system must
be mapped by a local access window.
The local access window registers exist as part of the local access block in the system configuration
registers. See
window registers is given in the following sections.
2.2.5
Table 2-2
Freescale Semiconductor
(0xFF40_0000)
LOCAL_BASE
0x004–0x01F
Offset from
0x000
shows the memory map for the local access registers.
local access windows associate a range of the local 32-bit address space with a particular target
Local Access Windows
Local Access Register Memory Map
Section 2.3.1.1, “System Configuration Registers.”
Internal Memory Map Base Address Register (IMMRBAR)
WINDOW 0
Base address set by the BASE_ADDR field of the IMMRBAR
register. Size fixed at 1 MB.
See
Reserved
Even though Window 0 uses only a 1 MB addressing range, it is
recommended that it be treated as a 4 MB addressing range. For example, if
IMMRBAR is set to 0xFF40_0000, reserve an address space of
0xFF40_0000–0xFF7F_FFFF. It is legal to use the 3 MB address space
directly above Window 0 in the MPC5125. However, this space may be used
in future derivatives of the MPC512x family of devices. Therefore, to
maintain code compatibility between the MPC5125 and future derivatives
of this family, it is recommended that this space not be used for user
program code.
Table 2-4
for individual module base addresses.
Table 2-2. Local Access Register Memory Map
MPC5125 Microcontroller Reference Manual, Rev. 2
Register
NOTE
Section 2.2.1, “Local Memory Map Overview and
System Configuration and Memory Map (XLBMEN + Mem Map)
A detailed description of the local access
Section 2.2.5.1.1, “Internal Memory
Access
R/W
1
0xFF80_0000
Reset Value Section/Page
2.2.5.1.1/2-5
2-3