MPC8536DS Freescale Semiconductor, MPC8536DS Datasheet - Page 95

BOARD DEV SYSTEM MPC8536E

MPC8536DS

Manufacturer Part Number
MPC8536DS
Description
BOARD DEV SYSTEM MPC8536E
Manufacturer
Freescale Semiconductor
Series
PowerQUICC III™r
Type
MPUr
Datasheets

Specifications of MPC8536DS

Contents
Board, Software and Documentation
Processor Series
MPC85xx
Core
e500
Data Bus Width
32 bit
Maximum Clock Frequency
667 MHz
Operating Supply Voltage
- 0.3 V to + 1.21 V
Maximum Operating Temperature
+ 105 C
Data Ram Size
32 KB
Interface Type
SPI, USB
Program Memory Type
DDR2, DDR3, SDRAM
Core Size
32 Bit
Program Memory Size
544KB
Cpu Speed
1.5GHz
Digital Ic Case Style
BGA
No. Of Pins
783
Supply Voltage Range
0.95V To 1.05V
Rohs Compliant
Yes
For Use With/related Products
MPC8536
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Table
Number
15-1
15-2
15-3
15-4
15-5
15-6
15-7
15-8
15-9
15-10
15-11
15-12
15-13
15-14
15-15
15-16
15-17
15-18
15-19
15-20
15-21
15-22
15-23
15-24
15-25
16-1
16-2
16-3
16-4
16-5
16-6
16-7
16-8
16-9
16-10
16-11
16-12
16-13
16-14
16-15
16-16
Freescale Semiconductor
Relationship of Modes and Features ..................................................................................... 15-3
DMA Mode Bit Settings ....................................................................................................... 15-3
DMA Signals—Detailed Signal Descriptions....................................................................... 15-5
DMA Register Summary ...................................................................................................... 15-6
MRn Field Descriptions ........................................................................................................ 15-9
SRn Field Descriptions ....................................................................................................... 15-12
ECLNDARn Field Descriptions ......................................................................................... 15-14
CLNDARn Field Descriptions............................................................................................ 15-14
SATRn Field Descriptions .................................................................................................. 15-15
SARn Field Descriptions .................................................................................................... 15-16
DATRn Field Descriptions.................................................................................................. 15-16
DARn Field Descriptions.................................................................................................... 15-17
BCRn Field Descriptions .................................................................................................... 15-18
NLNDARn Field Descriptions............................................................................................ 15-18
ENLNDARn Field Descriptions ......................................................................................... 15-19
ECLSDARn Field Descriptions .......................................................................................... 15-20
CLSDARn Field Descriptions ............................................................................................ 15-20
ENLSDARn Field Descriptions.......................................................................................... 15-21
NLSDARn Field Descriptions ............................................................................................ 15-21
SSRn Field Descriptions ..................................................................................................... 15-22
DSRn Field Descriptions .................................................................................................... 15-23
DGSR Field Descriptions.................................................................................................... 15-23
Channel State Table............................................................................................................. 15-31
List DMA Descriptor Summary.......................................................................................... 15-33
Link DMA Descriptor Summary ........................................................................................ 15-33
POR Parameters for PCI Controller...................................................................................... 16-5
PCI Interface Signals—Detailed Signal Descriptions .......................................................... 16-6
PCI Memory-Mapped Register Map................................................................................... 16-11
PCI CFG_ADDR Field Descriptions.................................................................................. 16-14
PCI CFG_DATA Field Descriptions ................................................................................... 16-15
PCI INT_ACK Field Descriptions...................................................................................... 16-15
POTARn Field Descriptions ............................................................................................... 16-16
POTEARn Field Descriptions............................................................................................. 16-17
POWBARn Field Descriptions ........................................................................................... 16-17
POWARn Field Descriptions .............................................................................................. 16-18
PITARn Field Descriptions ................................................................................................. 16-20
PIWBAR Field Descriptions............................................................................................... 16-21
PIWBEAR Field Descriptions ............................................................................................ 16-21
PIWARn Field Descriptions................................................................................................ 16-22
ERR_DR Field Descriptions ............................................................................................... 16-24
ERR_CAP_DR Field Descriptions ..................................................................................... 16-25
MPC8536E PowerQUICC III Integrated Processor Reference Manual, Rev. 1
Tables
Title
Number
Page
xcv

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