MPC8536DS Freescale Semiconductor, MPC8536DS Datasheet - Page 1160

• Manufacturer Part Number: MPC8536DS
• Description: BOARD DEV SYSTEM MPC8536E
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC III™r
• Type: MPUr

Specifications of MPC8536DS

• Contents: Board, Software and Documentation
• Processor Series: MPC85xx
• Core: e500
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 667 MHz
• Operating Supply Voltage: - 0.3 V to + 1.21 V
• Maximum Operating Temperature: + 105 C
• Data Ram Size: 32 KB
• Interface Type: SPI, USB
• Program Memory Type: DDR2, DDR3, SDRAM
• Core Size: 32 Bit
• Program Memory Size: 544KB
• Cpu Speed: 1.5GHz
• Digital Ic Case Style: BGA
• No. Of Pins: 783
• Supply Voltage Range: 0.95V To 1.05V
• Rohs Compliant: Yes
• For Use With/related Products: MPC8536
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PCI Express Interface Controller
17.3.8.3.13 PCI Express Prefetchable Base Upper 32 Bits Register—0x28
The PCI Express prefetchable memory base upper 32 bits register is shown in
Table 17-68
17.3.8.3.14 PCI Express Prefetchable Limit Upper 32 Bits Register—0x2C
The PCI Express prefetchable memory base upper 32 bits register is shown in
Table 17-69
17.3.8.3.15 PCI Express I/O Base Upper 16 Bits Register—0x30
Note that this device does not support inbound I/O transactions. The I/O base upper 16 bits register is
shown in
17-64
31–0
Offset 0x28
Bits
Offset 0x2C
Reset
Reset
31–0
Offset 0x30
Reset
Bits
W
W
W
R
R
R
31
31
PF Base Upper 32 Bits Specifies bits 64:32 of the prefetchable memory space start address when the address
Figure
PF Limit Upper 32 Bits Specifies bits 64–32 of the prefetchable memory space ending address when the address
15
describes the PCI Express prefetchable memory base upper 32 bits register fields.
describes the PCI Express prefetchable memory limit upper 32 bits register fields.
Name
Name
17-72.
Figure 17-70. PCI Express Prefetchable Base Upper 32 Bits Register
Figure 17-71. PCI Express Prefetchable Limit Upper 32 Bits Register
Table 17-68. PCI Express Prefetchable Base Upper 32 Bits Register
Table 17-69. PCI Express Prefetchable Limit Upper 32 Bits Register
MPC8536E PowerQUICC III Integrated Processor Reference Manual, Rev. 1
Figure 17-72. PCI Express I/O Base Upper 16 Bits Register
decode type field in the prefetchable memory base register is 0x01.
decode type field in the prefetchable memory limit register is 0x01.
PF Base Upper 32 Bits
I/O Base Upper 16 Bits
PF Limit Upper 32 Bits
All zeros
All zeros
All zeros
Description
Description
Figure
Figure
Freescale Semiconductor
17-70.
17-71.
Access: Read/Write
Access: Read/Write
Access: Read only
0
0
0