MPC8536DS Freescale Semiconductor, MPC8536DS Datasheet - Page 1634

• Manufacturer Part Number: MPC8536DS
• Description: BOARD DEV SYSTEM MPC8536E
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC III™r
• Type: MPUr

Specifications of MPC8536DS

• Contents: Board, Software and Documentation
• Processor Series: MPC85xx
• Core: e500
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 667 MHz
• Operating Supply Voltage: - 0.3 V to + 1.21 V
• Maximum Operating Temperature: + 105 C
• Data Ram Size: 32 KB
• Interface Type: SPI, USB
• Program Memory Type: DDR2, DDR3, SDRAM
• Core Size: 32 Bit
• Program Memory Size: 544KB
• Cpu Speed: 1.5GHz
• Digital Ic Case Style: BGA
• No. Of Pins: 783
• Supply Voltage Range: 0.95V To 1.05V
• Rohs Compliant: Yes
• For Use With/related Products: MPC8536
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Complete List of Configuration, Control, and Status Registers
A-22
0x2_42D0–
0x2_4240–
0x2_4288–
0x2_4308–
0x2_4318–
0x2_4344–
0x2_42CC TMR_TXTS2_L* - Tx time stamp high (set 2)
0x2_422C TBASE5*—TxBD base address of ring 5
0x2_423C TBASE7*—TxBD base address of ring 7
0x2_427C
0x2_42BC
0x2_42C0 TMR_TXTS1_H* - Tx time stamp high (set 1)
0x2_42C4 TMR_TXTS1_L* - Tx time stamp high (set 1)
0x2_42C8 TMR_TXTS2_H* - Tx time stamp high (set 2)
0x2_42FC
0x2_430C
0x2_432C
0x2_433C RQFPR*—Receive queue filing table property register
0x2_437C
0x2_4230 Reserved
0x2_4234 TBASE6*—TxBD base address of ring 6
0x2_4238 Reserved
0x2_4280 TMR_TXTS1_ID* - Tx time stamp identification tag (set 1)
0x2_4284 TMR_TXTS2_ID* - Tx time stamp identification tag (set 2)
0x2_4300 RCTRL—Receive control register
0x2_4304 RSTAT—Receive status register
0x2_4310 RXIC—Receive interrupt coalescing register
0x2_4314 RQUEUE*—Receive queue control register.
0x2_4330 RBIFX*—Receive bit field extract control register
0x2_4334 RQFAR*—Receive queue filing table address register
0x2_4338 RQFCR*—Receive queue filing table control register
0x2_4340 MRBLR—Maximum receive buffer length register
0x2_4380 RBDBPH*—Rx data buffer pointer high bits
0x2_4384 RBPTR0—RxBD pointer for ring 0
0x2_4388 Reserved
eTSEC1
Offset
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
MPC8536E PowerQUICC III Integrated Processor Reference Manual, Rev. 1
Table A-2. Module Memory Map (continued)
eTSEC Receive Control and Status Registers
Name
1
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
w1c
—
—
—
—
—
—
—
—
—
2
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0080_0080
0x0000_0000
0x0000_0000
0x nnnn_nnnn
0x nnnn_nnnn
0x0000_0000
0x0000_0000
0x0000_0000
Reset
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