MPC8536DS Freescale Semiconductor, MPC8536DS Datasheet - Page 848

• Manufacturer Part Number: MPC8536DS
• Description: BOARD DEV SYSTEM MPC8536E
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC III™r
• Type: MPUr

Specifications of MPC8536DS

• Contents: Board, Software and Documentation
• Processor Series: MPC85xx
• Core: e500
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 667 MHz
• Operating Supply Voltage: - 0.3 V to + 1.21 V
• Maximum Operating Temperature: + 105 C
• Data Ram Size: 32 KB
• Interface Type: SPI, USB
• Program Memory Type: DDR2, DDR3, SDRAM
• Core Size: 32 Bit
• Program Memory Size: 544KB
• Cpu Speed: 1.5GHz
• Digital Ic Case Style: BGA
• No. Of Pins: 783
• Supply Voltage Range: 0.95V To 1.05V
• Rohs Compliant: Yes
• For Use With/related Products: MPC8536
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Enhanced Three-Speed Ethernet Controllers
14.5.3.6.25 Transmit Byte Counter (TBYT)
Figure 14-79
Table 14-83
14.5.3.6.26 Transmit Packet Counter (TPKT)
Figure 14-80
Table 14-84
14-100
10–31 TPKT Transmit packet counter. Increments for each transmitted packet (including bad packets, excessive deferred
0–31
Bits
Bits
0–9
Offset eTSEC1:0x2_46E0;
Reset
Offset eTSEC1:0x2_46E4;
Reset
W
W
R
R
Name
Name
eTSEC3:0x2_66E4
eTSEC3:0x2_66E0
TBYT
—
0
0
describes the fields of the TBYT register.
describes the fields of the TPKT register.
depicts the TBYT register.
describes the definition for the TPKT register.
Reserved
packets, excessive collision packets, late collision packets, all unicast, broadcast, and multicast packets).
frames that were involved with collisions. This count does not include preamble/SFD or jam bytes, except for
half-duplex flow control (back-pressure triggered by TCTRL[THDF]=1). For THDF, the sum total of ‘phantom’
preamble bytes transmitted for flow control purposes is included in the TBYT increment value of the next
frame to be transmitted, up to 65,535 bytes of frame and phantom preamble.
Note that the value of TBYT may be greater than the actual number of bytes transmitted if the frame is
truncated because it exceeds MAXFRM.
Transmit byte counter. Increments by the number of bytes that were put on the wire including fragments of
MPC8536E PowerQUICC III Integrated Processor Reference Manual, Rev. 1
—
Figure 14-80. Transmit Packet Counter Register Definition
Figure 14-79. Transmit Byte Counter Register Definition
Table 14-83. TBYT Field Descriptions
Table 14-84. TPKT Field Descriptions
9
10
All zeros
All zeros
Description
TBYT
Description
TPKT
Freescale Semiconductor
Access: Read/Write
Access: Read/Write
31
31