MPC8536DS Freescale Semiconductor, MPC8536DS Datasheet - Page 190

• Manufacturer Part Number: MPC8536DS
• Description: BOARD DEV SYSTEM MPC8536E
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC III™r
• Type: MPUr

Specifications of MPC8536DS

• Contents: Board, Software and Documentation
• Processor Series: MPC85xx
• Core: e500
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 667 MHz
• Operating Supply Voltage: - 0.3 V to + 1.21 V
• Maximum Operating Temperature: + 105 C
• Data Ram Size: 32 KB
• Interface Type: SPI, USB
• Program Memory Type: DDR2, DDR3, SDRAM
• Core Size: 32 Bit
• Program Memory Size: 544KB
• Cpu Speed: 1.5GHz
• Digital Ic Case Style: BGA
• No. Of Pins: 783
• Supply Voltage Range: 0.95V To 1.05V
• Rohs Compliant: Yes
• For Use With/related Products: MPC8536
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Reset, Clocking, and Initialization
4.4.3.14
The eTSEC width input, shown in
Ethernet controller interface 1. Note that the value latched on this signal during POR is accessible through
the memory-mapped PORDEVSR (POR device status register) described in
Device Status Register (PORDEVSR).”
This input does not affect the width of the eTSEC1 FIFO interface, which is always an 8-bit FIFO
interface.
4.4.3.15
The eTSEC3 width input, shown in
Ethernet controller interface 3. Note that the value latched on this signal during POR is accessible through
the memory-mapped PORDEVSR (POR device status register) described in
Device Status Register (PORDEVSR).”
The value of this configuration setting does not affect the width of the FIFO interface on eTSEC3, which
is always 8 bits.
4-20
TSEC1_TX_ER
TSEC3_TX_ER
Functional
Default (1)
Functional
Default (1)
Signal
Signal
eTSEC1 width
eTSEC3 Width
Reset Configuration
Reset Configuration
cfg_tsec1_reduce
cfg_tsec3_reduce
MPC8536E PowerQUICC III Integrated Processor Reference Manual, Rev. 1
Name
Name
Table 4-22. eTSEC1 Width Configuration
Table 4-23. eTSEC3 Width Configuration
Table
(Binary)
(Binary)
Table
Value
Value
0
1
0
1
4-22, selects standard versus reduced width for three-speed
4-23, selects standard versus reduced width for three-speed
eTSEC3 Ethernet interface operates in reduced mode, either RTBI, RGMII
or RMII.
eTSEC3 Ethernet interface operates in standard TBI, GMII, MII, or 8-bit
FIFO mode (default).
eTSEC1 interface operates in reduced pin mode, either RTBI, RGMII or
RMII.
eTSEC1 interface operates in standard width TBI, GMII, MII, or in 8-bit
FIFO mode. (default)
Meaning
Meaning
Section 23.4.1.4, “POR
Section 23.4.1.4, “POR
Freescale Semiconductor