MPC8536DS Freescale Semiconductor, MPC8536DS Datasheet - Page 161

• Manufacturer Part Number: MPC8536DS
• Description: BOARD DEV SYSTEM MPC8536E
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC III™r
• Type: MPUr

Specifications of MPC8536DS

• Contents: Board, Software and Documentation
• Processor Series: MPC85xx
• Core: e500
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 667 MHz
• Operating Supply Voltage: - 0.3 V to + 1.21 V
• Maximum Operating Temperature: + 105 C
• Data Ram Size: 32 KB
• Interface Type: SPI, USB
• Program Memory Type: DDR2, DDR3, SDRAM
• Core Size: 32 Bit
• Program Memory Size: 544KB
• Cpu Speed: 1.5GHz
• Digital Ic Case Style: BGA
• No. Of Pins: 783
• Supply Voltage Range: 0.95V To 1.05V
• Rohs Compliant: Yes
• For Use With/related Products: MPC8536
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Freescale Semiconductor
PCI_C/BE[3:0]
PCI_GNT[3:4]
PCI_DEVSEL
MAPAR_ERR
MAPAR_OUT
PCI_AD[31:0]
MSRCID[2:4]
PCI_FRAME
MCKE[0:3]
MDQ[0:63]
MDQS[0:7]
MDQS[0:7]
MECC[0:7]
MODT[0:3]
PCI_GNT0
PCI_GNT1
MCK[0:5],
MDIC[0:1]
MSRCID0
MSRCID1
MDM[0:7]
MBA[2:0]
MCK[0:5]
MCS[0:3]
PCI_CLK
MDQS8
MDQS8
MDVAL
MCAS
MDM8
MRAS
Name
MWE
MCP
DDR address parity in
DDR address parity out
DDR bank select
DDR column address strobe
DDR differential clocks (3
pairs/DIMM)
DDR clock enable
Machine check processor
DDR chip select (2/DIMM)
Driver impedance calibration
DDR data mask
DDR ECC data mask
DDR data
DDR data strobe
DDR data strobe (complement)
DDR ECC data strobe
DDR ECC data strobe
(complement)
Memory debug data valid
DDR error correcting code
DRAM On-Die Termination
DDR row address strobe
Memory debug source port ID
2–4
Memory debug source port ID 0
Memory debug source port ID 1
DDR write enable
PCI address/data
PCI command/byte enable
PCI clock
PCI device select
PCI frame
PCI grant 3
PCI grant 0
PCI grant 1
MPC8536E PowerQUICC III Integrated Processor Reference Manual, Rev. 1
Table 3-2. MPC8536E Alphabetical Signal Reference (continued)
Description
DDR memory
DDR memory
DDR memory
DDR memory
DDR memory
DDR memory
DDR memory
DDR memory
DDR memory
DDR memory
DDR memory
DDR memory
DDR memory
DDR memory
DDR memory
DDR memory
DDR memory
DDR memory
DDR memory
Functional
Debug/
Debug
Debug
Debug
Debug
Block
PIC
PCI
PCI
PCI
PCI
PCI
PCI
PCI
PCI
Alternate Function(s)
cfg_mem_debug
cfg_ddr_debug
cfg_pci_impd
GPIO[2:3]
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Signals
No. of
12
64
32
1
1
3
1
4
1
4
2
8
1
8
8
1
1
1
8
4
1
3
1
1
1
4
1
1
1
1
1
1
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
I
I
I
Signal Descriptions
25-3/25-6
25-3/25-6
25-3/25-6
25-3/25-6
16-2/16-6
16-2/16-6
16-2/16-6
16-2/16-6
16-2/16-6
16-2/16-6
16-2/16-6
16-2/16-6
8-3/8-6
8-3/8-6
8-3/8-6
8-3/8-6
8-3/8-6
8-3/8-6
9-3/9-8
8-3/8-6
8-3/8-6
8-3/8-6
8-3/8-6
8-3/8-6
8-3/8-6
8-3/8-6
8-3/8-6
8-3/8-6
8-3/8-6
8-3/8-6
8-3/8-6
8-3/8-6
Table/
Page
3-11