MPC8536DS Freescale Semiconductor, MPC8536DS Datasheet - Page 163

• Manufacturer Part Number: MPC8536DS
• Description: BOARD DEV SYSTEM MPC8536E
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC III™r
• Type: MPUr

Specifications of MPC8536DS

• Contents: Board, Software and Documentation
• Processor Series: MPC85xx
• Core: e500
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 667 MHz
• Operating Supply Voltage: - 0.3 V to + 1.21 V
• Maximum Operating Temperature: + 105 C
• Data Ram Size: 32 KB
• Interface Type: SPI, USB
• Program Memory Type: DDR2, DDR3, SDRAM
• Core Size: 32 Bit
• Program Memory Size: 544KB
• Cpu Speed: 1.5GHz
• Digital Ic Case Style: BGA
• No. Of Pins: 783
• Supply Voltage Range: 0.95V To 1.05V
• Rohs Compliant: Yes
• For Use With/related Products: MPC8536
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

TSEC1_GTX_CLK TSEC1 transmit clock out
Freescale Semiconductor
TEMP_CATHODE
TSEC_1588_CLK
TSEC1_RX_CLK
SDHC_DAT[0:3]
SDHC_DAT[4:7]
TRIG_OUT[0:1]
TSEC1_RX_DV
TEMP_ANODE
PULSE_OUT1
PULSE_OUT2
TSEC_1588_
TSEC_1588_
TSEC_1588_
TSEC_1588_
TSEC_1588_
TRIG_IN[0:1]
TSEC1_CRS
TSEC1_COL
SDHC_CMD
SPI_CS[0:3]
SDHC_CLK
SDHC_WP
TEST_SEL
TRIG_OUT
SPI_MISO
SPI_MOSI
CLK_OUT
SPI_CLK
SRESET
SYSCLK
TRIG_IN
Name
TRST
TDO
TMS
TCK
TDI
eSDHC clock
eSDHC command
eSDHC data
eSDHC data
eSDHC write protect
SPI clock
SPI chip select 0–3
SPI master in slave out
SPI master out slave in
Soft reset
System clock/PCI clock
Test clock
Test data in
Test data out
Thermal diode access
Thermal diode access
Test select
Test mode select
Watchpoint trigger in
Watchpoint trigger out
Test reset
IEEE 1588 clock
IEEE 1588 clock out
IEEE 1588 pulse out 1
IEEE 1588 pulse out 2
IEEE 1588 trigger in
IEEE 1588 alarm out
TSEC1 collision detect
TSEC1 carrier sense
TSEC1 receive clock
TSEC1 receive data valid
MPC8536E PowerQUICC III Integrated Processor Reference Manual, Rev. 1
Table 3-2. MPC8536E Alphabetical Signal Reference (continued)
Description
System control
Functional
IEEE 1588
IEEE 1588
IEEE 1588
IEEE 1588
IEEE 1588
IEEE 1588
eTSEC1
eTSEC1
eTSEC1
eTSEC1
eTSEC1
eSDHC
eSDHC
eSDHC
eSDHC
eSDHC
Debug
Debug
Block
Clock
JTAG
JTAG
JTAG
JTAG
JTAG
Test
Test
Test
SPI
SPI
SPI
SPI
Alternate Function(s)
cfg_srds2_ref_clk1
cfg_srds2_prtcl2
SDHC_DAT[4:7]
FIFO1_RX_CLK
cfg_ddr_pll[0:1]
FIFO1_RX_FC
FIFO1_RX_DV
FIFO1_TX_FC
SPI_CS[0:3]
cfg_ddr_pll2
READY
GPIO5
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Signals
No. of
1
1
1
4
1
1
4
1
1
1
1
1
1
1
2
2
1
1
1
1
1
1
1
1
1
2
2
1
1
1
1
1
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
O
O
O
O
O
O
O
O
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
Signal Descriptions
14-2/14-10
14-2/14-10
14-2/14-10
14-2/14-10
14-2/14-10
14-2/14-10
14-2/14-10
14-2/14-10
14-2/14-10
14-2/14-10
14-2/14-10
20-1/20-4
20-1/20-4
20-1/20-4
20-1/20-4
20-1/20-4
18-1/18-4
18-1/18-4
18-1/18-4
18-1/18-4
25-5/25-8
25-5/25-8
25-5/25-8
25-5/25-8
25-5/25-8
25-5/25-8
25-5/25-8
25-4/25-7
25-4/25-7
25-5/25-8
4-2/4-2
4-3/4-3
Table/
Page
3-13