MPC8536DS Freescale Semiconductor, MPC8536DS Datasheet - Page 437

BOARD DEV SYSTEM MPC8536E

MPC8536DS

Manufacturer Part Number
MPC8536DS
Description
BOARD DEV SYSTEM MPC8536E
Manufacturer
Freescale Semiconductor
Series
PowerQUICC III™r
Type
MPUr
Datasheets

Specifications of MPC8536DS

Contents
Board, Software and Documentation
Processor Series
MPC85xx
Core
e500
Data Bus Width
32 bit
Maximum Clock Frequency
667 MHz
Operating Supply Voltage
- 0.3 V to + 1.21 V
Maximum Operating Temperature
+ 105 C
Data Ram Size
32 KB
Interface Type
SPI, USB
Program Memory Type
DDR2, DDR3, SDRAM
Core Size
32 Bit
Program Memory Size
544KB
Cpu Speed
1.5GHz
Digital Ic Case Style
BGA
No. Of Pins
783
Supply Voltage Range
0.95V To 1.05V
Rohs Compliant
Yes
For Use With/related Products
MPC8536
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For more information about the controller (including more details about channel-controlled and
host-controlled access), refer to
10.1.4
“Execution unit” (EU) is the generic term for the functional blocks that perform cryptographic
computations. The EUs are compatible with many protocols, and can work together to perform high-level
cryptographic tasks. The SEC’s execution units are as follows:
The following sections give an overview of the EUs. Operational details of each EU are given in
Section 10.7, “Execution Units.”
10.1.4.1
The PKEU is capable of performing many advanced mathematical functions to support both RSA and ECC
public key cryptographic algorithms. ECC is supported in both F
modes.
To assist the host in performing its desired cryptographic functions, the PKEU supports functions with
various levels of complexity. For example, at the highest level, the accelerator performs modular
exponentiations to support RSA and performs point multiplies to support ECC. At a lower level, the PKEU
can perform simple operations such as modular adds and multiplies. For more information about the unit’s
operation, refer to
10.1.4.1.1
The PKEU has its own data and control units, including a general-purpose register file in the
programmable-size arithmetic unit. The field or modulus size can be programmed to any value between
33 bits and 1024 bits in programmable increments of 8, with each programmable value i supporting all
actual field sizes from 8i – 7 to 8i. The result is hardware supporting a wide range of cryptographic security.
Larger field / modulus sizes result in greater security but lower performance.
Freescale Semiconductor
In host-controlled access (intended primarily for debug purposes), the host moves data in and out
of execution units directly through memory-mapped EU registers. No descriptor is involved.
PKEU for computing asymmetric key operations, including modular exponentiation (and other
modular arithmetic functions) or ECC point arithmetic
DEU for performing block cipher, symmetric key cryptography using DES and 3DES
AESU for performing the Advanced Encryption Standard algorithm in various modes
AFEU for performing RC-4 compatible stream cipher symmetric key cryptography
MDEU for performing security hashing using MD-5, SHA-1, SHA-224, SHA-256, SHA-384 or
SHA-512
KEU for performing 3GPP confidentiality (f8) and integrity (f9) algorithms.
CRCU for generating cyclical redundancy check values
RNGU for random number generation
Execution Units (EUs) Overview
Public Key Execution Unit (PKEU)
Elliptic Curve Operations
Section 10.7.7, “Public Key Execution Units (PKEU).”
MPC8536E PowerQUICC III Integrated Processor Reference Manual, Rev. 1
Section 10.5, “Controller.”
2
m (polynomial field) and F
Security Engine (SEC) 3.0
p
(prime field)
10-7

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