MPC8536DS Freescale Semiconductor, MPC8536DS Datasheet - Page 765

• Manufacturer Part Number: MPC8536DS
• Description: BOARD DEV SYSTEM MPC8536E
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC III™r
• Type: MPUr

Specifications of MPC8536DS

• Contents: Board, Software and Documentation
• Processor Series: MPC85xx
• Core: e500
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 667 MHz
• Operating Supply Voltage: - 0.3 V to + 1.21 V
• Maximum Operating Temperature: + 105 C
• Data Ram Size: 32 KB
• Interface Type: SPI, USB
• Program Memory Type: DDR2, DDR3, SDRAM
• Core Size: 32 Bit
• Program Memory Size: 544KB
• Cpu Speed: 1.5GHz
• Digital Ic Case Style: BGA
• No. Of Pins: 783
• Supply Voltage Range: 0.95V To 1.05V
• Rohs Compliant: Yes
• For Use With/related Products: MPC8536
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Freescale Semiconductor
0x2_41C0–
0x2_4240–
0x2_4288–
0x2_419C TBPTR3*—TxBD pointer for ring 3
0x2_41AC TBPTR5*—TxBD pointer for ring 5
0x2_41BC TBPTR7*—TxBD pointer for ring 7
0x2_41FC
0x2_420C TBASE1*—TxBD base address of ring 1
0x2_421C TBASE3*—TxBD base address of ring 3
0x2_422C TBASE5*—TxBD base address of ring 5
0x2_423C TBASE7*—TxBD base address of ring 7
0x2_427C
0x2_42BC
0x2_42C0 TMR_TXTS1_H* - Tx time stamp high (set 1)
0x2_41A0 Reserved
0x2_41A4 TBPTR4*—TxBD pointer for ring 4
0x2_41A8 Reserved
0x2_41B0 Reserved
0x2_41B4 TBPTR6*—TxBD pointer for ring 6
0x2_41B8 Reserved
0x2_4198 Reserved
0x2_4200 TBASEH*—TxBD base address high bits
0x2_4204 TBASE0—TxBD base address of ring 0
0x2_4208 Reserved
0x2_4210 Reserved
0x2_4214 TBASE2*—TxBD base address of ring 2
0x2_4218 Reserved
0x2_4220 Reserved
0x2_4224 TBASE4*—TxBD base address of ring 4
0x2_4228 Reserved
0x2_4230 Reserved
0x2_4234 TBASE6*—TxBD base address of ring 6
0x2_4238 Reserved
0x2_4280 TMR_TXTS1_ID* - Tx time stamp identification tag (set 1)
0x2_4284 TMR_TXTS2_ID* - Tx time stamp identification tag (set 2)
eTSEC1
Offset
Reserved
Reserved
Reserved
MPC8536E PowerQUICC III Integrated Processor Reference Manual, Rev. 1
Table 14-4. Module Memory Map (continued)
Name
1
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Enhanced Three-Speed Ethernet Controllers
2
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
Reset
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
14.5.3.2.10/14-51
14.5.3.2.11/14-52
14.5.3.2.11/14-52
14.5.3.2.11/14-52
14.5.3.2.11/14-52
14.5.3.2.11/14-52
14.5.3.2.11/14-52
14.5.3.2.11/14-52
14.5.3.2.11/14-52
14.5.3.2.12/14-52
14.5.3.2.12/14-52
14.5.3.2.13/14-53
14.5.3.2.9/14-50
14.5.3.2.9/14-50
14.5.3.2.9/14-50
14.5.3.2.9/14-50
14.5.3.2.9/14-50
Section/Page
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
14-17