MPC8536DS Freescale Semiconductor, MPC8536DS Datasheet - Page 1286

• Manufacturer Part Number: MPC8536DS
• Description: BOARD DEV SYSTEM MPC8536E
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC III™r
• Type: MPUr

Specifications of MPC8536DS

• Contents: Board, Software and Documentation
• Processor Series: MPC85xx
• Core: e500
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 667 MHz
• Operating Supply Voltage: - 0.3 V to + 1.21 V
• Maximum Operating Temperature: + 105 C
• Data Ram Size: 32 KB
• Interface Type: SPI, USB
• Program Memory Type: DDR2, DDR3, SDRAM
• Core Size: 32 Bit
• Program Memory Size: 544KB
• Cpu Speed: 1.5GHz
• Digital Ic Case Style: BGA
• No. Of Pins: 783
• Supply Voltage Range: 0.95V To 1.05V
• Rohs Compliant: Yes
• For Use With/related Products: MPC8536
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Enhanced Secure Digital Host Controller
Since the eSDHC may have a multiple block data transfer executing concurrently with a CMD_wo_DAT
command, the eSDHC stores the Auto CMD12 response in the CMDRSP3 register and the
CMD_wo_DAT response is stored in CMDRSP0. This allows the eSDHC to avoid overwriting the Auto
CMD12 response with the CMD_wo_DAT and vice versa. When the eSDHC modifies part of the
command response registers it preserves the unmodified bits.
20.4.6
The buffer data port register is a 32-bit data port register used to access the internal buffer.
20-12
Reset
DATCONT
Offset: 0x020 (DATPORT)
Field
0–31
W
R
0
Buffer Data Port Register (DATPORT)
Data content. The buffer data port register is for 32-bit data access by the CPU or an external DMA. When the
internal DMA is enabled, any write to this register is ignored, and a read from this register always yields 0.
When the internal DMA is not enabled and a write transaction is in
operation, DATPORT must not be read. DATPORT also must not be used to
read (or write) data by the CPU or external DMA if the data will be written
(or read) by the eSDHC internal DMA.
MPC8536E PowerQUICC III Integrated Processor Reference Manual, Rev. 1
Figure 20-8. Buffer Data Port Register (DATPORT)
Table 20-10. DATPORT Field Descriptions
NOTE
DATCONT
All zeros
Description
Freescale Semiconductor
Access: Read/Write
31