MPC8536DS Freescale Semiconductor, MPC8536DS Datasheet - Page 888

• Manufacturer Part Number: MPC8536DS
• Description: BOARD DEV SYSTEM MPC8536E
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC III™r
• Type: MPUr

Specifications of MPC8536DS

• Contents: Board, Software and Documentation
• Processor Series: MPC85xx
• Core: e500
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 667 MHz
• Operating Supply Voltage: - 0.3 V to + 1.21 V
• Maximum Operating Temperature: + 105 C
• Data Ram Size: 32 KB
• Interface Type: SPI, USB
• Program Memory Type: DDR2, DDR3, SDRAM
• Core Size: 32 Bit
• Program Memory Size: 544KB
• Cpu Speed: 1.5GHz
• Digital Ic Case Style: BGA
• No. Of Pins: 783
• Supply Voltage Range: 0.95V To 1.05V
• Rohs Compliant: Yes
• For Use With/related Products: MPC8536
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Enhanced Three-Speed Ethernet Controllers
14.5.4.3.4
Figure 14-125
Table 14-135
14-140
Bits
2–3
4–6
7–8
0
1
9
Offset 0x05
Reset
W
R Next Page
Next Page Next page. This bit is read-only. The link partner sets or clears this bit.
Remote
Duplex
Pause
Name
Fault
Half
—
—
0
describes the fields of the ANLPBPA register.
describes the definition for the ANLPBPA register.
AN Link Partner Base Page Ability Register (ANLPBPA)
0 Link partner has no subsequent next pages or is not capable of receiving next pages.
1 Link partner either requesting next page transmission or indicating the capability to receive next pages.
Reserved. (Ignore on read)
The link partner’s remote fault condition is encoded in bits 2 and 3 of the base page. Values are shown in
the remote fault encoding field table below. This bit is read-only.
Reserved, should be cleared.
Encoding of the link partner’s PAUSE capability is shown in the PAUSE encoding table below. For priority
resolution information consult. This bit is read-only
Half-duplex capability. This bit is read-only.
0 Link partner is not capable of half-duplex mode.
1 Link partner is capable of half-duplex mode.
PAUSE bit[8]
Figure 14-125. AN Link Partner Base Page Ability Register Definition
—
1
MPC8536E PowerQUICC III Integrated Processor Reference Manual, Rev. 1
0
0
1
1
Remote Fault
2
RF1 bit[3]
0
0
1
1
Table 14-135. ANLPBPA Field Descriptions
ASM_DIR bit[7]
3
0
1
0
1
RF2 bit[2]
4
0
1
0
1
—
6
No PAUSE
Asymmetric PAUSE toward link partner
Symmetric PAUSE
Both symmetric PAUSE and
Asymmetric PAUSE toward local device
No error, link OK
Offline
Link_Failure
Auto-Negotiation_Error
7
Pause
All zeros
Description
8
Half Duplex Full Duplex
Description
9
Capability
10
Freescale Semiconductor
11
Access: Read/Write
—
15