MPC8536DS Freescale Semiconductor, MPC8536DS Datasheet - Page 442

• Manufacturer Part Number: MPC8536DS
• Description: BOARD DEV SYSTEM MPC8536E
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC III™r
• Type: MPUr

Specifications of MPC8536DS

• Contents: Board, Software and Documentation
• Processor Series: MPC85xx
• Core: e500
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 667 MHz
• Operating Supply Voltage: - 0.3 V to + 1.21 V
• Maximum Operating Temperature: + 105 C
• Data Ram Size: 32 KB
• Interface Type: SPI, USB
• Program Memory Type: DDR2, DDR3, SDRAM
• Core Size: 32 Bit
• Program Memory Size: 544KB
• Cpu Speed: 1.5GHz
• Digital Ic Case Style: BGA
• No. Of Pins: 783
• Supply Voltage Range: 0.95V To 1.05V
• Rohs Compliant: Yes
• For Use With/related Products: MPC8536
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Security Engine (SEC) 3.0
Table 10-3
All SEC registers are allocated 8 bytes (one dword), and the addresses listed in the table are all at 8-byte
boundaries (addresses end in 0 or 8). It is possible, however, to access the registers by 4-byte words, or in
some cases by byte. The "Write by" column in
are interpreted as follows:
Reads can always be done by byte, word, or dword.
10-12
0x3_C000–0x3_CFFF
0x3_A000–0x3_AFFF
0x3_E000–0x3_EFFF
0x3_F000–0x3_FFFF
0x3_2000–0x3_2FFF
0x3_4000–0x3_4FFF
0x3_6000–0x3_6FFF
0x3_8000–0x3_8FFF
Byte Address Offset
0x3_1000–0x3_10FF
0x3_1100–0x3_11FF
0x3_1200–0x3_12FF
0x3_1300–0x3_13FF
0x3_1400–0x3_14FF
0x3_1500–0x3_16FF
•
•
(AD 17–0)
0x3_1BF8
Byte: This register can be written by byte (using any address), by word (using an address ending in
0, 4, 8, or C), or by dword (using an address ending in 0 or 8).
Word: This register can be written by dword (using an address ending in 0 or 8), or by word (using
an address ending in 0, 4, 8, or C), but not by byte.
shows the detailed system address map showing all functional registers.
MPC8536E PowerQUICC III Integrated Processor Reference Manual, Rev. 1
Channel_1 Channel 1
Channel_2 Channel 2
Channel_3 Channel 3
Channel_4 Channel 4
Controller Arbiter/controller control register space
Controller IP block revision register
PolyChn
Module
MDEU
RNGU
CRCU
AESU
AFEU
PKEU
DEU
KEU
PolyChannel
DES/3DES execution unit
AES execution unit
Message digest execution unit
Arc Four execution unit
Random number generator unit
Public key execution unit
Kasumi execution unit
Cyclical Redundancy Check Unit
Table 10-2. SEC Address Map
Description
Table 10-3
distinguishes these cases. The column entries
Crypto EU
Read only
Controller
Channels
Type
Also see RCA bits in
Freescale Semiconductor
10.5.4.5/10-54
10.7.4/10-108
10.7.6/10-132
10.7.8/10-155
10.7.7/10-146
10.7.5/10-117
10.4.3/10-35
10.7.1/10-57
10.7.2/10-88
10.7.3/10-98
Table 10-21
Reference
10.5/10-46
10.4/10-32