MPC8536DS Freescale Semiconductor, MPC8536DS Datasheet - Page 1621

BOARD DEV SYSTEM MPC8536E

MPC8536DS

Manufacturer Part Number
MPC8536DS
Description
BOARD DEV SYSTEM MPC8536E
Manufacturer
Freescale Semiconductor
Series
PowerQUICC III™r
Type
MPUr
Datasheets

Specifications of MPC8536DS

Contents
Board, Software and Documentation
Processor Series
MPC85xx
Core
e500
Data Bus Width
32 bit
Maximum Clock Frequency
667 MHz
Operating Supply Voltage
- 0.3 V to + 1.21 V
Maximum Operating Temperature
+ 105 C
Data Ram Size
32 KB
Interface Type
SPI, USB
Program Memory Type
DDR2, DDR3, SDRAM
Core Size
32 Bit
Program Memory Size
544KB
Cpu Speed
1.5GHz
Digital Ic Case Style
BGA
No. Of Pins
783
Supply Voltage Range
0.95V To 1.05V
Rohs Compliant
Yes
For Use With/related Products
MPC8536
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Freescale Semiconductor
0xC14–
0xC34–
0xC54–
0xC0C
0xC1C
0xC2C
0xC3C
0xC4C
0xC5C
0xC6C
Offset
0xC00
0xC04
0xC08
0xC10
0xC20
0xC24
0xC28
0xC30
0xC40
0xC44
0xC48
0xC50
0xC60
0xC64
0xC68
POTAR0—PCI outbound window 0 (default) translation
address register
POTEAR0—PCI outbound window 0 (default) translation
extended address register
Reserved
Reserved
POWAR0—PCI outbound window 0 (default) attributes
register
Reserved
POTAR1—PCI outbound window 1 translation address
register
POTEAR1—PCI outbound window 1 translation extended
address register
POWBAR1—PCI outbound window 1 base address register
Reserved
POWAR1—PCI outbound window 1 attributes register
Reserved
POTAR2—PCI outbound window 2 translation address
register
POTEAR2—PCI outbound window 2 translation extended
address register
POWBAR2—PCI outbound window 2 base address register
Reserved
POWAR2—PCI outbound window 2 attributes register
Reserved
POTAR3—PCI outbound window 3 translation address
register
POTEAR3—PCI outbound window 3 translation extended
address register
POWBAR3—PCI outbound window 3 base address register
Reserved
MPC8536E PowerQUICC III Integrated Processor Reference Manual, Rev. 1
Table A-9. PCI Controller Registers (continued)
PCI Controller—Block Base Address 0x0_8000
PCI ATMU Registers—Outbound and Inbound
0xC00–0xC3C–Outbound Window 0 (default)
Register
0xC20–0xC3C—Outbound Window 1
0xC40–0xC5C—Outbound Window 2
0xC60–0xC7C—Outbound Window 3
Complete List of Configuration, Control, and Status Registers
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
0x0000_0000
0x0000_0000
0x8004_401F
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
Reset
16.3.1.2.1/16-16
16.3.1.2.2/16-16
16.3.1.2.4/16-17
16.3.1.2.1/16-16
16.3.1.2.2/16-16
16.3.1.2.3/16-17
16.3.1.2.4/16-17
16.3.1.2.1/16-16
16.3.1.2.2/16-16
16.3.1.2.3/16-17
16.3.1.2.4/16-17
16.3.1.2.1/16-16
16.3.1.2.2/16-16
16.3.1.2.3/16-17
Section/Page
A-9

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