MPC8536DS Freescale Semiconductor, MPC8536DS Datasheet - Page 1431

• Manufacturer Part Number: MPC8536DS
• Description: BOARD DEV SYSTEM MPC8536E
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC III™r
• Type: MPUr

Specifications of MPC8536DS

• Contents: Board, Software and Documentation
• Processor Series: MPC85xx
• Core: e500
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 667 MHz
• Operating Supply Voltage: - 0.3 V to + 1.21 V
• Maximum Operating Temperature: + 105 C
• Data Ram Size: 32 KB
• Interface Type: SPI, USB
• Program Memory Type: DDR2, DDR3, SDRAM
• Core Size: 32 Bit
• Program Memory Size: 544KB
• Cpu Speed: 1.5GHz
• Digital Ic Case Style: BGA
• No. Of Pins: 783
• Supply Voltage Range: 0.95V To 1.05V
• Rohs Compliant: Yes
• For Use With/related Products: MPC8536
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

21.6.12.2.8 Managing the QH[FrameTag] Field
The QH[FrameTag] field in a queue head is completely managed by the host controller. The rules for
setting QH[FrameTag] are simple:
Freescale Semiconductor
Condition
not(A)
not(D)
not(C)
not(B)
not(D)
•
•
•
A
A
C
A
B
C
D
Rule 1: If transitioning from Do Start Split to Do Complete Split and the current value of
FRINDEX[2–0] is 6, QH[FrameTag] is set to FRINDEX[7–3] + 1. This accommodates split
transactions whose start-split and complete-splits are in different H-Frames (case 2a, see
Figure
Rule 2: If the current value of FRINDEX[2–0] is 7, QH[FrameTag] is set to FRINDEX[7–3] + 1.
This accommodates staying in Do Complete Split for cases 2a, 2b, and 2c in
Rule 3: If transitioning from Do_Start Split to Do Complete Split and the current value of
FRINDEX[2–0] is not 6, or currently in Do Complete Split and the current value of
(FRINDEX[2–0]) is not 7, FrameTag is set to FRINDEX[7–3]. This accommodates all other cases
in
Figure
Ignore QHD
If PIDCode = IN
Halt QHDIf PIDCode = OUT
Retry start-split
If PIDCode = IN
Halt QHD
If PIDCode = OUT
Retry start-split
Execute complete-split
If PIDCode = IN
Halt QHDIf PIDCode = OUT
Retry start-split
21-52).
Table 21-67. Interrupt IN/OUT Do Complete Split State Execution Criteria
21-52.
MPC8536E PowerQUICC III Integrated Processor Reference Manual, Rev. 1
Action
Neither a start nor complete-split is scheduled for the current micro-frame.Host
controller should continue walking the schedule.
Progress bit check failed. These means a complete-split has been missed. There is
the possibility of lost data. If PID Code is an IN, then the Queue head must be
halted.If PID Code is an OUT, then the transfer state is not advanced and the state
exited (for example, start-split is retried). This is a host-induced error and does not
effect Cerr. In either case, set the Missed Micro-frame bit in the status field to a one.
QH.FrameTag test failed. This means that exactly one or more H-Frames have been
skipped. This means complete-splits and have missed. There is the possibility of lost
data. If PID Code is an IN, then the Queue head must be halted.If PID Code is an
OUT, then the transfer state is not advanced and the state exited (for example,
start-split is retried). This is a host-induced error and does not effect Cerr. In either
case, set the Missed Micro-frame bit in the status field to a one.
This is the non-error case where the host controller executes a complete-split
transaction.
This is a degenerate case where the start-split was issued, but all of the
complete-splits were skipped and all possible intervening opportunities to detect the
missed data failed to fire. If PID Code is an IN, then the Queue head must be halted.
If PID Code is an OUT, then the transfer state is not advanced and the state exited
(for example, start-split is retried). This is a host-induced error and does not effect
Cerr. In either case, set the Missed Micro-frame bit in the status field to a one. Note
that when executing in the context of a Recovery Path mode, the host controller is
allowed to process the queue head and take the actions indicated above, or it may
wait until the queue head is visited in the normal processing mode. Regardless, the
host controller must not execute a start-split in the context of a executing in a
Recovery Path mode.
Description
Universal Serial Bus Interfaces
Figure
21-52.
21-97