MPC8536DS Freescale Semiconductor, MPC8536DS Datasheet - Page 1251

BOARD DEV SYSTEM MPC8536E

MPC8536DS

Manufacturer Part Number
MPC8536DS
Description
BOARD DEV SYSTEM MPC8536E
Manufacturer
Freescale Semiconductor
Series
PowerQUICC III™r
Type
MPUr
Datasheets

Specifications of MPC8536DS

Contents
Board, Software and Documentation
Processor Series
MPC85xx
Core
e500
Data Bus Width
32 bit
Maximum Clock Frequency
667 MHz
Operating Supply Voltage
- 0.3 V to + 1.21 V
Maximum Operating Temperature
+ 105 C
Data Ram Size
32 KB
Interface Type
SPI, USB
Program Memory Type
DDR2, DDR3, SDRAM
Core Size
32 Bit
Program Memory Size
544KB
Cpu Speed
1.5GHz
Digital Ic Case Style
BGA
No. Of Pins
783
Supply Voltage Range
0.95V To 1.05V
Rohs Compliant
Yes
For Use With/related Products
MPC8536
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
19.3.4.2
TransStatus, shown in
Table 19-18
19.3.4.3
LinkCfg, shown in
Table 19-19
Freescale Semiconductor
Offset 0x1_8148
Reset
Reset 1
Offset
31–27
Reset
Bit
26
W
W
R
R
W
R
31
15
0x1_8144
15
1
describes the TransStatus fields.
describes the LinkCfg fields.
Transport Layer Status Register (TransStatus)
Link Layer Configuration Register (LinkCfg)
Name
POE
1
Figure
MPC8536E PowerQUICC III Integrated Processor Reference Manual, Rev. 1
1
AR
Figure
Figure 19-18. Transport Layer Status Register (TransStatus)
27
15–8
1
Figure 19-19. Link Layer Configuration Register (LinkCfg)
7–0
Bit
19-19, controls the configuration of the link layer.
Reserved
Primitive override enable. When set, this bit enables the replacement of a single primitive, as
specified by CFG_PRIM/CFG_CD, when the link layer state machine is in the
CFG_PRIM_OVR_STATE state. This bit has to be toggled from a 0 to a 1 to enable this
feature.
POE
26
1
TX_SM
19-18, can be read to determine the status of the transport layer.
Table 19-18. TransStatus Field Descriptions
25
1
Table 19-19. LinkCfg Field Descriptions
RX_SM
TX_SM
Name
1
8
EPNRT S4A
0
7
Indicates the state of Tx state machine.
Indicates the state of Rx state machine.
6
0
All zeros
8
RX_SCR
_EN
1
5
Description
7
Description
TX_SCR
_EN
1
4
PRT
TX_PRIM
_JUNK
0
3
RX_SM
TX_CO
NT_EN
1
2
Access: Read/Write
RX_BAD
Access: Read only
_CRC
0
1
SATA Controller
TX_BAD
_CRC
16
0
19-21
0
0

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