MPC8536DS Freescale Semiconductor, MPC8536DS Datasheet - Page 1050

• Manufacturer Part Number: MPC8536DS
• Description: BOARD DEV SYSTEM MPC8536E
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC III™r
• Type: MPUr

Specifications of MPC8536DS

• Contents: Board, Software and Documentation
• Processor Series: MPC85xx
• Core: e500
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 667 MHz
• Operating Supply Voltage: - 0.3 V to + 1.21 V
• Maximum Operating Temperature: + 105 C
• Data Ram Size: 32 KB
• Interface Type: SPI, USB
• Program Memory Type: DDR2, DDR3, SDRAM
• Core Size: 32 Bit
• Program Memory Size: 544KB
• Cpu Speed: 1.5GHz
• Digital Ic Case Style: BGA
• No. Of Pins: 783
• Supply Voltage Range: 0.95V To 1.05V
• Rohs Compliant: Yes
• For Use With/related Products: MPC8536
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PCI Bus Interface
16.3.1.4.1
Table 16-15
core_fault_in, which causes the core to generate a machine check interrupt, unless it is disabled (by
clearing HID1[RFXE]). If RFXE is zero and an error occurs, the appropriate parity detect and master-abort
bits in ERR_DR must be cleared and the appropriate enable bits in ERR_EN must be set to ensure that an
interrupt is generated. See
16-24
Offset 0xE00
Reset
Reset
Reset
Reset
W
W
W
W
R
R
R
R
1–20 —
Bits
21
22
23
24
25
26
0
describes ERR_DR fields. Note that uncorrectable read errors may cause the assertion of
Multiple PCI
Trgt PERR
PCI Error Detect Register (ERR_DR)
Errors
Multiple PCI errors 0 Multiple PCI errors of the same type were not detected (write-1-to-clear)
Addr Parity error
Rcvd SERR error
Mstr PERR error
Trgt PERR error
Mstr abort error
Trgt abort error
error
w1c
w1c
16
24
0
8
MPC8536E PowerQUICC III Integrated Processor Reference Manual, Rev. 1
Name
Mstr abort
Section 6.10.2, “Hardware Implementation-Dependent Register 1 (HID1).”
Figure 16-15. PCI Error Detect Register (ERR_DR)
error
w1c
25
1
Table 16-15. ERR_DR Field Descriptions
1 Multiple PCI errors of the same type were detected
Reserved
Address parity error (write-1-to-clear)
Received SERR error (write-1-to-clear)
Master PERR error (write-1-to-clear)
Target PERR error (write-1-to-clear)
Master abort error (write-1-to-clear)
Target abort error (write-1-to-clear)
Trgt abort
error
w1c
26
—
OWMSV
error
w1c
27
All zeros
All zeros
All zeros
All zeros
—
ORMSV
Description
error
w1c
20
28
—
Addr Parity
IRMSV
error
error
w1c
w1c
21
29
Rcvd SERR
SCM error
error
w1c
w1c
22
30
Freescale Semiconductor
Access: w1c
Mstr PERR
TOE error
error
w1c
w1c
15
23
31
7