MPC8536DS Freescale Semiconductor, MPC8536DS Datasheet - Page 3

BOARD DEV SYSTEM MPC8536E

MPC8536DS

Manufacturer Part Number
MPC8536DS
Description
BOARD DEV SYSTEM MPC8536E
Manufacturer
Freescale Semiconductor
Series
PowerQUICC III™r
Type
MPUr
Datasheets

Specifications of MPC8536DS

Contents
Board, Software and Documentation
Processor Series
MPC85xx
Core
e500
Data Bus Width
32 bit
Maximum Clock Frequency
667 MHz
Operating Supply Voltage
- 0.3 V to + 1.21 V
Maximum Operating Temperature
+ 105 C
Data Ram Size
32 KB
Interface Type
SPI, USB
Program Memory Type
DDR2, DDR3, SDRAM
Core Size
32 Bit
Program Memory Size
544KB
Cpu Speed
1.5GHz
Digital Ic Case Style
BGA
No. Of Pins
783
Supply Voltage Range
0.95V To 1.05V
Rohs Compliant
Yes
For Use With/related Products
MPC8536
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Paragraph
Number
1.1
1.2
1.2.1
1.3
1.3.1
1.3.2
1.3.3
1.3.4
1.3.4.1
1.3.4.2
1.3.5
1.3.6
1.3.6.1
1.3.6.2
1.3.7
1.3.8
1.3.9
1.3.10
1.3.11
Freescale Semiconductor
Audience ...........................................................................................................................cix
Organizations ....................................................................................................................cix
Suggested Reading...........................................................................................................cxii
Conventions ................................................................................................................... cxiii
Signal Conventions .........................................................................................................cxiv
Register Access Conventions..........................................................................................cxiv
Acronyms and Abbreviations .........................................................................................cxiv
Introduction...................................................................................................................... 1-1
MPC8536E Overview...................................................................................................... 1-2
MPC8536E Architecture Overview................................................................................. 1-3
General Information.....................................................................................................cxii
Related Documentation................................................................................................cxii
Key Features ................................................................................................................ 1-2
e500 Core and Memory Unit ....................................................................................... 1-3
e500 Coherency Module (ECM) and Address Map .................................................... 1-3
Integrated Security Engine (SEC)................................................................................ 1-4
High-Speed Interface Blocks (SerDes)........................................................................ 1-4
Enhanced Three-Speed Ethernet Controllers (eTSEC) ............................................... 1-5
Universal Serial Bus (USB) Dual-Role Controllers .................................................... 1-6
DDR SDRAM Controller ............................................................................................ 1-7
Power Management Controller.................................................................................... 1-7
PCI Express Controller ................................................................................................ 1-8
Programmable Interrupt Controller (PIC).................................................................... 1-8
Enhanced Secure Digital Host Controller (eSDHC).................................................... 1-8
MPC8536E PowerQUICC III Integrated Processor Reference Manual, Rev. 1
Eight-Lane SerDes................................................................................................... 1-5
Two-Lane SerDes .................................................................................................... 1-5
Host Mode Operation .............................................................................................. 1-6
Device Mode Operation........................................................................................... 1-6
About This Book
Contents
Chapter 1
Overview
Overview
Part I
Title
Contents
Number
Page
iii

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