MPC8536DS Freescale Semiconductor, MPC8536DS Datasheet - Page 1001

• Manufacturer Part Number: MPC8536DS
• Description: BOARD DEV SYSTEM MPC8536E
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC III™r
• Type: MPUr

Specifications of MPC8536DS

• Contents: Board, Software and Documentation
• Processor Series: MPC85xx
• Core: e500
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 667 MHz
• Operating Supply Voltage: - 0.3 V to + 1.21 V
• Maximum Operating Temperature: + 105 C
• Data Ram Size: 32 KB
• Interface Type: SPI, USB
• Program Memory Type: DDR2, DDR3, SDRAM
• Core Size: 32 Bit
• Program Memory Size: 544KB
• Cpu Speed: 1.5GHz
• Digital Ic Case Style: BGA
• No. Of Pins: 783
• Supply Voltage Range: 0.95V To 1.05V
• Rohs Compliant: Yes
• For Use With/related Products: MPC8536
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

15.3.1.4
The source attributes registers, shown in
DMA operation. Stride mode is enabled by setting SATRn[SSME].
Table 15-9
15.3.1.5
The source address registers, shown in
reads data. In direct mode, if MRn[CDSM/SWSM] and MRn[SRW] are set, a write to this register
simultaneously sets MRn[CS], starting a DMA transfer. Software must ensure that this is a valid address.
Freescale Semiconductor
12–15
16–27
28–31
8–11
Bits
0–6
Offset 0x110
Reset
7
W
R
0x190
0x210
0x290
0
SREADTTYPE DMA source transaction type. Reserved values result in a programming error being detected and
describes the fields of the SATRn.
Name
SSME
ESAD
Source Attributes Registers (SATR n )
—
—
—
Source Address Registers (SAR n )
—
MPC8536E PowerQUICC III Integrated Processor Reference Manual, Rev. 1
Reserved
Source stride mode enable
0 Stride mode disabled
1 Stride mode enabled
Ignored in basic mode (MR n [XFE] is cleared). Striding on the source address can be accomplished
by enabling SATR n [SSME] and setting the desired stride size and distance in the SSR n .
Reserved
logged in SR[PE].
0000–0001 Reserved
0011 Reserved
0100 Read, don’t snoop local processor
0101 Read, snoop local processor
0111–1111 Reserved
Reserved
Extended source address.
ESAD represents the four high-order bits of the 36-bit source address.
Transaction type to run on local address space
6
Figure 15-9. Source Attributes Registers (SATR n )
SSME
7
Table 15-9. SATR n Field Descriptions
8
Figure
Figure
—
11 12
15-10, contain the address from which the DMA controller
15-9, contain the transaction attributes to be used for the
SREADTTYPE
All zeros
Description
15 16
—
Access: Read/Write
27 28
DMA Controller
ESAD
15-15
31