MPC8536DS Freescale Semiconductor, MPC8536DS Datasheet - Page 1487

• Manufacturer Part Number: MPC8536DS
• Description: BOARD DEV SYSTEM MPC8536E
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC III™r
• Type: MPUr

Specifications of MPC8536DS

• Contents: Board, Software and Documentation
• Processor Series: MPC85xx
• Core: e500
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 667 MHz
• Operating Supply Voltage: - 0.3 V to + 1.21 V
• Maximum Operating Temperature: + 105 C
• Data Ram Size: 32 KB
• Interface Type: SPI, USB
• Program Memory Type: DDR2, DDR3, SDRAM
• Core Size: 32 Bit
• Program Memory Size: 544KB
• Cpu Speed: 1.5GHz
• Digital Ic Case Style: BGA
• No. Of Pins: 783
• Supply Voltage Range: 0.95V To 1.05V
• Rohs Compliant: Yes
• For Use With/related Products: MPC8536
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Table 22-3
22.3.2
The GPIO open drain register (GPODR), shown in
their output.
Table 22-4
22.3.3
The GPIO data register (GPDAT), shown in
Freescale Semiconductor
0–31
0–31
Bits
Bits
Offset 0xC04
Reset
Offset 0xC08
Reset
W
W
R
R
Name
Name
0
0
D n
D n
defines the bit fields of GPDIR.
defines the bit fields of GPODR.
GPIO Open Drain Register (GPODR)
GPIO Data Register (GPDAT)
Direction. Indicates whether a signal is used as an input or an output. Bits D0–D15 correspond to signals
GPIO[0:15]. Bits D16–D31 are unused.
0 The corresponding signal is an input.
1 The corresponding signal is an output.
Open-drain configuration. Indicates whether a signal is actively driven as an output or an open-drain driver.
This register has no effect on signals programmed as inputs in the corresponding GPDIR. Bits D0–D15
correspond to signals GPIO[0:15]. Bits D16–D31 are unused.
0 The I/O signal is actively driven as an output.
1 The I/O signal is an open-drain driver. As an output, the signal is driven active-low, otherwise it is
three-stated.
MPC8536E PowerQUICC III Integrated Processor Reference Manual, Rev. 1
Figure 22-3. GPIO Open Drain Register (GPODR)
Figure 22-4. GPIO Data Register (GPDAT)
Table 22-4. GPODR Bit Settings
Table 22-3. GPDIR Bit Settings
Figure
Figure
22-4, carries the data in/out for the individual ports.
All zeros
All zeros
Description
Description
D n
D n
22-3, defines the way individual ports drive
General Purpose I/O (GPIO)
Access: Read/write
Access: Read/write
22-3
31
31